Wiki-DB - User contributions [en]

DHCOM iMX6-D2

2026-04-15T06:02:46Z

Ageisreiter: /* Product Change Notifications (PCN) */

{|
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|
|-
|__TOC__
|[[Image:IM6Modul.png|600px|COM iMX6-D2]]
|}

== Hardware ==

{| class="wikitable" align="center" | style="width: 100%; color: #000000; background: #f3f3f3;" valign="top" |
|-
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* '''Cortex-A9 Freescale i.MX6 Solo/DualLite/Dual/Quad up to 1.2GHz'''
* 2D (GC320) / 3D (GC880/GC2000) graphics accelerator
* 128 - 1024 MByte NAND flash memory (8 bit bus width) or 4 - 16 GByte eMMC flash (8 bit bus width)
* 2 MB SPI boot flash
* 256 - 2048 MByte DDR3-1066 or DDR3-800
* On module microSD card socket (4 bit SDIO) [1]
* SD/MMC card interface, 4 bit SDIO
* LC display controller, 24 bit colors, 2048x1536 pixels
* LVDS 4-channel, max. 165 Mpixels/s
* On-board touch controller for 4-wire resistive touch screens
* Ethernet controller 10/100 Mbit, IEEE1588 conform
* USB 2.0 OTG high-speed
* USB 2.0 host high speed
* Full function UART [2]
* Standard UART with hardware handshake support
* Standard UART
 [1] On module microSD card socket is only available if second CAN port is not connected.
 [2] CTS and RTS is only available if second CAN port is not connected.
|valign="top" style="border: 0pt;" |
* 2x CAN interface [1][2]
* 2x SPI interface
* 2x I²C interface
* I²S Audio codec (1 x microphone, 1 x Line in, 1x Line out)
* Real-time clock (I²C connection), low power temperature compensated
* 12 bit analog input
* 128 Bytes EEPROM with integrated MAC address
* 16 bit address/databus interface on SODIMM-200 socket
* PWM channel
* 24 GPIOs (A-W + INT_HI_PRIO)
* JTAG debug connection via FFC plug connector
* Industrial temperature range (-40°C to +85°C)
* SODIMM-200 socket with DHCOM pin assignment
|}

*[[COM iMX6 Hardware|Hardware Support]]

== Product Change Notifications (PCN) ==
* [[media:PCN_iMX6_R01_2017-08-17.pdf|PCN_iMX6_R01_2017-08-17.pdf (4GByte eMMC)]]
* [[media:PCN_iMX6_R02_2017-08-17.pdf|PCN_iMX6_R02_2017-08-17.pdf (8GByte eMMC)]]
* [[media:PCN_iMX6_R03_2017-09-20.pdf|PCN_iMX6_R03_2017-09-20.pdf (SW ethernet bug)]]
* [[media:PCN_iMX6_R04_2017-09-25.pdf|PCN_iMX6_R04_2017-09-25.pdf (Molex microSD socket)]]
* [[media:PCN_iMX6_R05_2018-01-10.pdf|PCN_iMX6_R05_2018-01-10.pdf (512MB NAND flash)]]
* [[media:PCN_iMX6_R06_2018-10-09.pdf|PCN_iMX6_R06_2018-10-09.pdf (label change)]]
* [[media:PCN_iMX6_R07_2019-11-13.pdf|PCN_iMX6_R07_2019-11-13.pdf (4GByte eMMC)]]
* [[media:PCN_iMX6_R08_2019-11-13.pdf|PCN_iMX6_R08_2019-11-13.pdf (8GByte eMMC)]]
* [[media:PCN_iMX6-009_R01_2021-07-20.pdf|PCN_iMX6-009_R01_2021-07-20.pdf (SPI flash EOL)]]
* [[media:PCN_DHCOM-iMX6-010_R01_2021-12-23.pdf|PCN_DHCOM-iMX6-010_R01_2021-12-23.pdf (microSD socket EOL)]]
* [[media:PCN_DHCOM-iMX6-011_R01_2022-07-18.pdf|PCN_DHCOM-iMX6-011_R01_2022-07-18.pdf (adress latch)]]
* [[media:PCN_DHCOM-iMX6-012_R01_2025-07-28.pdf|PCN_DHCOM-iMX6-012_R01_2025-07-28.pdf (reset monitor)]]
* [[media:PCN_DHCOM-iMX6-013_R02_2026-04-10.pdf|PCN_DHCOM-iMX6-013_R02_2026-04-10.pdf (4Gbyte eMMC Samsung)]]
* [[media:PCN_DHCOM-iMX6-014_R02_2026-04-10.pdf|PCN_DHCOM-iMX6-014_R02_2026-04-10.pdf (8Gbyte eMMC Samsung)]]
* [[media:PCN_DHCOM-iMX6-015_R01_2026-04-10.pdf|PCN_DHCOM-iMX6-015_R01_2026-04-10.pdf (512Mbyte NAND Skyhigh)]]

== Software Support ==
*[[COM iMX6 Bootloader U-Boot|i.MX6: Bootloader U-Boot]]
*[[COM iMX6 Linux|i.MX6: Linux]]
*[[DHCOM Update Mechanism|DHCOM Update Mechanism]]
* [https://github.com/dh-electronics/meta-dhsom-imx-bsp Yocto BSP meta layer --> Github]
* [https://github.com/dh-electronics/kas-dhsom Easy Yocto build via KAS --> Github]
*[[COM iMX6 WinCE|i.MX6: WinCE]]

== BSP Sources==
==== [https://www.denx.de/wiki/U-Boot U-Boot] ====
* [https://github.com/dh-electronics/u-boot-imx6qdl/tree/dev/legacy/2018.05_dhcom DH U-Boot (based on v2018.05)]
* [https://github.com/dh-electronics/u-boot-imx6qdl/tree/dev/2015.10_dhcom DH U-Boot (based on v2015.10)(deprecated)]
* [https://github.com/dh-electronics/u-boot-imx6qdl/tree/dev/2013.10_dhcom DH U-Boot (based on v2013.10)(deprecated)]

==== [https://www.kernel.org Linux Kernel] ====
* Mainline
:* [https://github.com/dh-electronics/linux-imx6qdl/tree/release/5.10.131_dhsom/20220725 DH 5.10.131 Release 2022-07-25]
* NXP Vendor
:* [https://github.com/dh-electronics/linux-imx6-vendor/tree/release/v4.1.15/20190926 DH 4.1.15 Release 2019-09-26]
:* [https://github.com/dh-electronics/linux-imx6-vendor/tree/release/v3.10.17/20170804 DH 3.10.17 Release 2017-08-04]

== Download binaries/images ==
==== U-Boot (for eMMC DHCOMs) ====
* [[media:U-boot-with-spl_imx6_v2.4.0.0_emmc.imx|DH U-Boot v2.4.0.0 (based on v2018.05)]]
* [[media:V1-1-0-8_u-boot-imx6qdl.tar.xz|DH U-Boot v1.1.0.8 (based on v2015.10)]]
: More on how to program it with the U-Boot command "update bootloader ..." on the page [[DHCOM Update Mechanism#Commandline Mode|"DHCOM Update Mechanism"]]

==== Update Kernel ====
* Please contact DH electronics if you need a binary.
: More on how to use it on the page [[DHCOM Update Mechanism|"DHCOM Update Mechanism"]]

==== Debian based images ====
* Debian 10 "Buster" + Kernel 5.10.131 Release 2022-08-19
: Note: Devicetree is set to "imx6q-dhcom-pdk2.dtb" in uLinuxEnv.txt

:* [[media:HD00035_2022-08-19_imx6_buster_sdcard_2000MB.img.xz|SD card: 2GB image (xz compressed)]]
:: Open it with Disks by double click on Debian Linux. Use [https://www.balena.io/etcher balenaEtcher] on Windows.

:* [[media:HD00035_2022-08-19_imx6_buster_USB_stick_update.zip|eMMC: USB stick update image]]
:: Extract the files on a USB stick (MBR / FAT32) and insert it into your board / device. More about the files on the page [[DHCOM Update Mechanism|"DHCOM Update Mechanism"]]

* Debian 8 "Jessie" with Qt5.9.1 + Vendor Kernel 4.1.15 Release 2019-09-26

:* [[media:HD00039_2019-09-26_imx6_jessie_qt5.9.1_sdcard_2000MB.img.xz|SD card: 2GB image (xz compressed)]]
:: Open it with Disks by double click on Debian Linux. Use [https://www.balena.io/etcher balenaEtcher] on Windows.

:* [[media:HD00039_2019-09-26_imx6_jessie_qt5.9.1_USB_stick_update.zip|eMMC: USB stick update image]]
:: Extract the files on a USB stick (MBR / FAT32) and insert it into your board / device. More about the files on the page [[DHCOM Update Mechanism|"DHCOM Update Mechanism"]]

Hint: You can also progam the eMMC by using the [[COM iMX6 Bootloader U-Boot#USB Mass Storage|U-Boot command "ums"]] (usable since U-Boot v2018.05)

== Download Linux code examples ==
==== [[Virtual Machine for Application Development#Code Examples for Userspace-Applications to Access SPI, I2C, GPIOs, and more|Code Examples for Userspace-Applications to Access SPI, I2C, GPIOs, and more]] ====

== Download WEC ==
==== WEC7 DHHalLib.dll (function library) ====
* [[media:DHHalLib_WEC7_R11_2022-05-11.zip|Download DHHalLib Library Version 1.3.0.7]]
* [[media:DHHalLib_Test_App_Source_WEC7_R10_2022-04-06.zip|DHHalLib Demo App Source Code ]]
* [[media:DHHalLib_Test_App_Binary_WEC7_R10_2022-04-06.zip|DHHalLib Demo App Binary File]]
* [[media:CSharp_LibWrapper_Source_WEC7_R09_2022-03-18.zip|Download DHHalLib CSharp Wrapper]]
* [[media:CSharp_LibWrapper.zip|Download DHHalLib CSharp Demo Wrapper App ]]
* [[media:CSharp_LibWrapper_Binary.zip|Download DHHalLib CSharp Demo Wrapper App Binary File]]

==== WEC7 binary BSP ====
* [[media:2016-05-19_DHCOM_iMX6_BSP_BIN.zip|Download WEC7 binary BSP (date: 2016-05-19)]]

==== WEC2013 DHHalLib.dll (function library) ====
* [[media:DHHalLib_WEC2013_R12_2021-10-01.zip|Download DHHalLib Library Version 1.4.2.2]]
* [[media:DHHalLib_Test_App_Source_WEC2013_R07_2018_06_12.zip|DHHalLib Demo App Source Code ]]
* [[media:DHHalLib_Test_App_Binary_WEC2013_R09_2021-10-01.zip|DHHalLib Demo App Binary File]]
* [[media:CSharp_LibWrapper_Source_WEC2013_R07_2021-10-01.zip|Download DHHalLib CSharp Wrapper]]
* [[media:CSharp_DHHalLib_Wrapper_App_Source_WEC2013_R05_2017_08_08.zip|DHHalLib C# Demo App Source Code]]
* [[media:CSharp_DHHalLib_Wrapper_App_Binary_WEC2013_R05_2017_08_08.zip|DHHalLib C# Demo App Binary File]]

File:PCN DHCOM-iMX6-013 R02 2026-04-10.pdf

2026-04-15T06:02:31Z

Ageisreiter:

DHCOM iMX6-D2

2026-04-15T06:00:17Z

Ageisreiter: /* Product Change Notifications (PCN) */

{|
|
|
|-
|__TOC__
|[[Image:IM6Modul.png|600px|COM iMX6-D2]]
|}

== Hardware ==

{| class="wikitable" align="center" | style="width: 100%; color: #000000; background: #f3f3f3;" valign="top" |
|-
| style="width: 50%; background: #076b8d; border: 0pt;" |
| style="width: 50%; background: #076b8d; border: 0pt;" |
|-
|valign="top" style="border: 0pt;" |
* '''Cortex-A9 Freescale i.MX6 Solo/DualLite/Dual/Quad up to 1.2GHz'''
* 2D (GC320) / 3D (GC880/GC2000) graphics accelerator
* 128 - 1024 MByte NAND flash memory (8 bit bus width) or 4 - 16 GByte eMMC flash (8 bit bus width)
* 2 MB SPI boot flash
* 256 - 2048 MByte DDR3-1066 or DDR3-800
* On module microSD card socket (4 bit SDIO) [1]
* SD/MMC card interface, 4 bit SDIO
* LC display controller, 24 bit colors, 2048x1536 pixels
* LVDS 4-channel, max. 165 Mpixels/s
* On-board touch controller for 4-wire resistive touch screens
* Ethernet controller 10/100 Mbit, IEEE1588 conform
* USB 2.0 OTG high-speed
* USB 2.0 host high speed
* Full function UART [2]
* Standard UART with hardware handshake support
* Standard UART
 [1] On module microSD card socket is only available if second CAN port is not connected.
 [2] CTS and RTS is only available if second CAN port is not connected.
|valign="top" style="border: 0pt;" |
* 2x CAN interface [1][2]
* 2x SPI interface
* 2x I²C interface
* I²S Audio codec (1 x microphone, 1 x Line in, 1x Line out)
* Real-time clock (I²C connection), low power temperature compensated
* 12 bit analog input
* 128 Bytes EEPROM with integrated MAC address
* 16 bit address/databus interface on SODIMM-200 socket
* PWM channel
* 24 GPIOs (A-W + INT_HI_PRIO)
* JTAG debug connection via FFC plug connector
* Industrial temperature range (-40°C to +85°C)
* SODIMM-200 socket with DHCOM pin assignment
|}

*[[COM iMX6 Hardware|Hardware Support]]

== Product Change Notifications (PCN) ==
* [[media:PCN_iMX6_R01_2017-08-17.pdf|PCN_iMX6_R01_2017-08-17.pdf (4GByte eMMC)]]
* [[media:PCN_iMX6_R02_2017-08-17.pdf|PCN_iMX6_R02_2017-08-17.pdf (8GByte eMMC)]]
* [[media:PCN_iMX6_R03_2017-09-20.pdf|PCN_iMX6_R03_2017-09-20.pdf (SW ethernet bug)]]
* [[media:PCN_iMX6_R04_2017-09-25.pdf|PCN_iMX6_R04_2017-09-25.pdf (Molex microSD socket)]]
* [[media:PCN_iMX6_R05_2018-01-10.pdf|PCN_iMX6_R05_2018-01-10.pdf (512MB NAND flash)]]
* [[media:PCN_iMX6_R06_2018-10-09.pdf|PCN_iMX6_R06_2018-10-09.pdf (label change)]]
* [[media:PCN_iMX6_R07_2019-11-13.pdf|PCN_iMX6_R07_2019-11-13.pdf (4GByte eMMC)]]
* [[media:PCN_iMX6_R08_2019-11-13.pdf|PCN_iMX6_R08_2019-11-13.pdf (8GByte eMMC)]]
* [[media:PCN_iMX6-009_R01_2021-07-20.pdf|PCN_iMX6-009_R01_2021-07-20.pdf (SPI flash EOL)]]
* [[media:PCN_DHCOM-iMX6-010_R01_2021-12-23.pdf|PCN_DHCOM-iMX6-010_R01_2021-12-23.pdf (microSD socket EOL)]]
* [[media:PCN_DHCOM-iMX6-011_R01_2022-07-18.pdf|PCN_DHCOM-iMX6-011_R01_2022-07-18.pdf (adress latch)]]
* [[media:PCN_DHCOM-iMX6-012_R01_2025-07-28.pdf|PCN_DHCOM-iMX6-012_R01_2025-07-28.pdf (reset monitor)]]
* [[media:PCN_DHCOM-iMX6-013_R02_2025-11-17.pdf|PCN_DHCOM-iMX6-013_R02_2025-11-17.pdf (4Gbyte eMMC Samsung)]]
* [[media:PCN_DHCOM-iMX6-014_R02_2026-04-10.pdf|PCN_DHCOM-iMX6-014_R02_2026-04-10.pdf (8Gbyte eMMC Samsung)]]
* [[media:PCN_DHCOM-iMX6-015_R01_2026-04-10.pdf|PCN_DHCOM-iMX6-015_R01_2026-04-10.pdf (512Mbyte NAND Skyhigh)]]

== Software Support ==
*[[COM iMX6 Bootloader U-Boot|i.MX6: Bootloader U-Boot]]
*[[COM iMX6 Linux|i.MX6: Linux]]
*[[DHCOM Update Mechanism|DHCOM Update Mechanism]]
* [https://github.com/dh-electronics/meta-dhsom-imx-bsp Yocto BSP meta layer --> Github]
* [https://github.com/dh-electronics/kas-dhsom Easy Yocto build via KAS --> Github]
*[[COM iMX6 WinCE|i.MX6: WinCE]]

== BSP Sources==
==== [https://www.denx.de/wiki/U-Boot U-Boot] ====
* [https://github.com/dh-electronics/u-boot-imx6qdl/tree/dev/legacy/2018.05_dhcom DH U-Boot (based on v2018.05)]
* [https://github.com/dh-electronics/u-boot-imx6qdl/tree/dev/2015.10_dhcom DH U-Boot (based on v2015.10)(deprecated)]
* [https://github.com/dh-electronics/u-boot-imx6qdl/tree/dev/2013.10_dhcom DH U-Boot (based on v2013.10)(deprecated)]

==== [https://www.kernel.org Linux Kernel] ====
* Mainline
:* [https://github.com/dh-electronics/linux-imx6qdl/tree/release/5.10.131_dhsom/20220725 DH 5.10.131 Release 2022-07-25]
* NXP Vendor
:* [https://github.com/dh-electronics/linux-imx6-vendor/tree/release/v4.1.15/20190926 DH 4.1.15 Release 2019-09-26]
:* [https://github.com/dh-electronics/linux-imx6-vendor/tree/release/v3.10.17/20170804 DH 3.10.17 Release 2017-08-04]

== Download binaries/images ==
==== U-Boot (for eMMC DHCOMs) ====
* [[media:U-boot-with-spl_imx6_v2.4.0.0_emmc.imx|DH U-Boot v2.4.0.0 (based on v2018.05)]]
* [[media:V1-1-0-8_u-boot-imx6qdl.tar.xz|DH U-Boot v1.1.0.8 (based on v2015.10)]]
: More on how to program it with the U-Boot command "update bootloader ..." on the page [[DHCOM Update Mechanism#Commandline Mode|"DHCOM Update Mechanism"]]

==== Update Kernel ====
* Please contact DH electronics if you need a binary.
: More on how to use it on the page [[DHCOM Update Mechanism|"DHCOM Update Mechanism"]]

==== Debian based images ====
* Debian 10 "Buster" + Kernel 5.10.131 Release 2022-08-19
: Note: Devicetree is set to "imx6q-dhcom-pdk2.dtb" in uLinuxEnv.txt

:* [[media:HD00035_2022-08-19_imx6_buster_sdcard_2000MB.img.xz|SD card: 2GB image (xz compressed)]]
:: Open it with Disks by double click on Debian Linux. Use [https://www.balena.io/etcher balenaEtcher] on Windows.

:* [[media:HD00035_2022-08-19_imx6_buster_USB_stick_update.zip|eMMC: USB stick update image]]
:: Extract the files on a USB stick (MBR / FAT32) and insert it into your board / device. More about the files on the page [[DHCOM Update Mechanism|"DHCOM Update Mechanism"]]

* Debian 8 "Jessie" with Qt5.9.1 + Vendor Kernel 4.1.15 Release 2019-09-26

:* [[media:HD00039_2019-09-26_imx6_jessie_qt5.9.1_sdcard_2000MB.img.xz|SD card: 2GB image (xz compressed)]]
:: Open it with Disks by double click on Debian Linux. Use [https://www.balena.io/etcher balenaEtcher] on Windows.

:* [[media:HD00039_2019-09-26_imx6_jessie_qt5.9.1_USB_stick_update.zip|eMMC: USB stick update image]]
:: Extract the files on a USB stick (MBR / FAT32) and insert it into your board / device. More about the files on the page [[DHCOM Update Mechanism|"DHCOM Update Mechanism"]]

Hint: You can also progam the eMMC by using the [[COM iMX6 Bootloader U-Boot#USB Mass Storage|U-Boot command "ums"]] (usable since U-Boot v2018.05)

== Download Linux code examples ==
==== [[Virtual Machine for Application Development#Code Examples for Userspace-Applications to Access SPI, I2C, GPIOs, and more|Code Examples for Userspace-Applications to Access SPI, I2C, GPIOs, and more]] ====

== Download WEC ==
==== WEC7 DHHalLib.dll (function library) ====
* [[media:DHHalLib_WEC7_R11_2022-05-11.zip|Download DHHalLib Library Version 1.3.0.7]]
* [[media:DHHalLib_Test_App_Source_WEC7_R10_2022-04-06.zip|DHHalLib Demo App Source Code ]]
* [[media:DHHalLib_Test_App_Binary_WEC7_R10_2022-04-06.zip|DHHalLib Demo App Binary File]]
* [[media:CSharp_LibWrapper_Source_WEC7_R09_2022-03-18.zip|Download DHHalLib CSharp Wrapper]]
* [[media:CSharp_LibWrapper.zip|Download DHHalLib CSharp Demo Wrapper App ]]
* [[media:CSharp_LibWrapper_Binary.zip|Download DHHalLib CSharp Demo Wrapper App Binary File]]

==== WEC7 binary BSP ====
* [[media:2016-05-19_DHCOM_iMX6_BSP_BIN.zip|Download WEC7 binary BSP (date: 2016-05-19)]]

==== WEC2013 DHHalLib.dll (function library) ====
* [[media:DHHalLib_WEC2013_R12_2021-10-01.zip|Download DHHalLib Library Version 1.4.2.2]]
* [[media:DHHalLib_Test_App_Source_WEC2013_R07_2018_06_12.zip|DHHalLib Demo App Source Code ]]
* [[media:DHHalLib_Test_App_Binary_WEC2013_R09_2021-10-01.zip|DHHalLib Demo App Binary File]]
* [[media:CSharp_LibWrapper_Source_WEC2013_R07_2021-10-01.zip|Download DHHalLib CSharp Wrapper]]
* [[media:CSharp_DHHalLib_Wrapper_App_Source_WEC2013_R05_2017_08_08.zip|DHHalLib C# Demo App Source Code]]
* [[media:CSharp_DHHalLib_Wrapper_App_Binary_WEC2013_R05_2017_08_08.zip|DHHalLib C# Demo App Binary File]]

File:PCN DHCOM-iMX6-014 R02 2026-04-10.pdf

2026-04-15T05:59:48Z

Ageisreiter:

DHCOM iMX6-D2

2026-04-15T05:57:10Z

Ageisreiter: /* Product Change Notifications (PCN) */

{|
|
|
|-
|__TOC__
|[[Image:IM6Modul.png|600px|COM iMX6-D2]]
|}

== Hardware ==

{| class="wikitable" align="center" | style="width: 100%; color: #000000; background: #f3f3f3;" valign="top" |
|-
| style="width: 50%; background: #076b8d; border: 0pt;" |
| style="width: 50%; background: #076b8d; border: 0pt;" |
|-
|valign="top" style="border: 0pt;" |
* '''Cortex-A9 Freescale i.MX6 Solo/DualLite/Dual/Quad up to 1.2GHz'''
* 2D (GC320) / 3D (GC880/GC2000) graphics accelerator
* 128 - 1024 MByte NAND flash memory (8 bit bus width) or 4 - 16 GByte eMMC flash (8 bit bus width)
* 2 MB SPI boot flash
* 256 - 2048 MByte DDR3-1066 or DDR3-800
* On module microSD card socket (4 bit SDIO) [1]
* SD/MMC card interface, 4 bit SDIO
* LC display controller, 24 bit colors, 2048x1536 pixels
* LVDS 4-channel, max. 165 Mpixels/s
* On-board touch controller for 4-wire resistive touch screens
* Ethernet controller 10/100 Mbit, IEEE1588 conform
* USB 2.0 OTG high-speed
* USB 2.0 host high speed
* Full function UART [2]
* Standard UART with hardware handshake support
* Standard UART
 [1] On module microSD card socket is only available if second CAN port is not connected.
 [2] CTS and RTS is only available if second CAN port is not connected.
|valign="top" style="border: 0pt;" |
* 2x CAN interface [1][2]
* 2x SPI interface
* 2x I²C interface
* I²S Audio codec (1 x microphone, 1 x Line in, 1x Line out)
* Real-time clock (I²C connection), low power temperature compensated
* 12 bit analog input
* 128 Bytes EEPROM with integrated MAC address
* 16 bit address/databus interface on SODIMM-200 socket
* PWM channel
* 24 GPIOs (A-W + INT_HI_PRIO)
* JTAG debug connection via FFC plug connector
* Industrial temperature range (-40°C to +85°C)
* SODIMM-200 socket with DHCOM pin assignment
|}

*[[COM iMX6 Hardware|Hardware Support]]

== Product Change Notifications (PCN) ==
* [[media:PCN_iMX6_R01_2017-08-17.pdf|PCN_iMX6_R01_2017-08-17.pdf (4GByte eMMC)]]
* [[media:PCN_iMX6_R02_2017-08-17.pdf|PCN_iMX6_R02_2017-08-17.pdf (8GByte eMMC)]]
* [[media:PCN_iMX6_R03_2017-09-20.pdf|PCN_iMX6_R03_2017-09-20.pdf (SW ethernet bug)]]
* [[media:PCN_iMX6_R04_2017-09-25.pdf|PCN_iMX6_R04_2017-09-25.pdf (Molex microSD socket)]]
* [[media:PCN_iMX6_R05_2018-01-10.pdf|PCN_iMX6_R05_2018-01-10.pdf (512MB NAND flash)]]
* [[media:PCN_iMX6_R06_2018-10-09.pdf|PCN_iMX6_R06_2018-10-09.pdf (label change)]]
* [[media:PCN_iMX6_R07_2019-11-13.pdf|PCN_iMX6_R07_2019-11-13.pdf (4GByte eMMC)]]
* [[media:PCN_iMX6_R08_2019-11-13.pdf|PCN_iMX6_R08_2019-11-13.pdf (8GByte eMMC)]]
* [[media:PCN_iMX6-009_R01_2021-07-20.pdf|PCN_iMX6-009_R01_2021-07-20.pdf (SPI flash EOL)]]
* [[media:PCN_DHCOM-iMX6-010_R01_2021-12-23.pdf|PCN_DHCOM-iMX6-010_R01_2021-12-23.pdf (microSD socket EOL)]]
* [[media:PCN_DHCOM-iMX6-011_R01_2022-07-18.pdf|PCN_DHCOM-iMX6-011_R01_2022-07-18.pdf (adress latch)]]
* [[media:PCN_DHCOM-iMX6-012_R01_2025-07-28.pdf|PCN_DHCOM-iMX6-012_R01_2025-07-28.pdf (reset monitor)]]
* [[media:PCN_DHCOM-iMX6-013_R02_2025-11-17.pdf|PCN_DHCOM-iMX6-013_R02_2025-11-17.pdf (4Gbyte eMMC Samsung)]]
* [[media:PCN_DHCOM-iMX6-014_R02_2025-12-01.pdf|PCN_DHCOM-iMX6-014_R02_2025-12-01.pdf (8Gbyte eMMC Samsung)]]
* [[media:PCN_DHCOM-iMX6-015_R01_2026-04-10.pdf|PCN_DHCOM-iMX6-015_R01_2026-04-10.pdf (512Mbyte NAND Skyhigh)]]

== Software Support ==
*[[COM iMX6 Bootloader U-Boot|i.MX6: Bootloader U-Boot]]
*[[COM iMX6 Linux|i.MX6: Linux]]
*[[DHCOM Update Mechanism|DHCOM Update Mechanism]]
* [https://github.com/dh-electronics/meta-dhsom-imx-bsp Yocto BSP meta layer --> Github]
* [https://github.com/dh-electronics/kas-dhsom Easy Yocto build via KAS --> Github]
*[[COM iMX6 WinCE|i.MX6: WinCE]]

== BSP Sources==
==== [https://www.denx.de/wiki/U-Boot U-Boot] ====
* [https://github.com/dh-electronics/u-boot-imx6qdl/tree/dev/legacy/2018.05_dhcom DH U-Boot (based on v2018.05)]
* [https://github.com/dh-electronics/u-boot-imx6qdl/tree/dev/2015.10_dhcom DH U-Boot (based on v2015.10)(deprecated)]
* [https://github.com/dh-electronics/u-boot-imx6qdl/tree/dev/2013.10_dhcom DH U-Boot (based on v2013.10)(deprecated)]

==== [https://www.kernel.org Linux Kernel] ====
* Mainline
:* [https://github.com/dh-electronics/linux-imx6qdl/tree/release/5.10.131_dhsom/20220725 DH 5.10.131 Release 2022-07-25]
* NXP Vendor
:* [https://github.com/dh-electronics/linux-imx6-vendor/tree/release/v4.1.15/20190926 DH 4.1.15 Release 2019-09-26]
:* [https://github.com/dh-electronics/linux-imx6-vendor/tree/release/v3.10.17/20170804 DH 3.10.17 Release 2017-08-04]

== Download binaries/images ==
==== U-Boot (for eMMC DHCOMs) ====
* [[media:U-boot-with-spl_imx6_v2.4.0.0_emmc.imx|DH U-Boot v2.4.0.0 (based on v2018.05)]]
* [[media:V1-1-0-8_u-boot-imx6qdl.tar.xz|DH U-Boot v1.1.0.8 (based on v2015.10)]]
: More on how to program it with the U-Boot command "update bootloader ..." on the page [[DHCOM Update Mechanism#Commandline Mode|"DHCOM Update Mechanism"]]

==== Update Kernel ====
* Please contact DH electronics if you need a binary.
: More on how to use it on the page [[DHCOM Update Mechanism|"DHCOM Update Mechanism"]]

==== Debian based images ====
* Debian 10 "Buster" + Kernel 5.10.131 Release 2022-08-19
: Note: Devicetree is set to "imx6q-dhcom-pdk2.dtb" in uLinuxEnv.txt

:* [[media:HD00035_2022-08-19_imx6_buster_sdcard_2000MB.img.xz|SD card: 2GB image (xz compressed)]]
:: Open it with Disks by double click on Debian Linux. Use [https://www.balena.io/etcher balenaEtcher] on Windows.

:* [[media:HD00035_2022-08-19_imx6_buster_USB_stick_update.zip|eMMC: USB stick update image]]
:: Extract the files on a USB stick (MBR / FAT32) and insert it into your board / device. More about the files on the page [[DHCOM Update Mechanism|"DHCOM Update Mechanism"]]

* Debian 8 "Jessie" with Qt5.9.1 + Vendor Kernel 4.1.15 Release 2019-09-26

:* [[media:HD00039_2019-09-26_imx6_jessie_qt5.9.1_sdcard_2000MB.img.xz|SD card: 2GB image (xz compressed)]]
:: Open it with Disks by double click on Debian Linux. Use [https://www.balena.io/etcher balenaEtcher] on Windows.

:* [[media:HD00039_2019-09-26_imx6_jessie_qt5.9.1_USB_stick_update.zip|eMMC: USB stick update image]]
:: Extract the files on a USB stick (MBR / FAT32) and insert it into your board / device. More about the files on the page [[DHCOM Update Mechanism|"DHCOM Update Mechanism"]]

Hint: You can also progam the eMMC by using the [[COM iMX6 Bootloader U-Boot#USB Mass Storage|U-Boot command "ums"]] (usable since U-Boot v2018.05)

== Download Linux code examples ==
==== [[Virtual Machine for Application Development#Code Examples for Userspace-Applications to Access SPI, I2C, GPIOs, and more|Code Examples for Userspace-Applications to Access SPI, I2C, GPIOs, and more]] ====

== Download WEC ==
==== WEC7 DHHalLib.dll (function library) ====
* [[media:DHHalLib_WEC7_R11_2022-05-11.zip|Download DHHalLib Library Version 1.3.0.7]]
* [[media:DHHalLib_Test_App_Source_WEC7_R10_2022-04-06.zip|DHHalLib Demo App Source Code ]]
* [[media:DHHalLib_Test_App_Binary_WEC7_R10_2022-04-06.zip|DHHalLib Demo App Binary File]]
* [[media:CSharp_LibWrapper_Source_WEC7_R09_2022-03-18.zip|Download DHHalLib CSharp Wrapper]]
* [[media:CSharp_LibWrapper.zip|Download DHHalLib CSharp Demo Wrapper App ]]
* [[media:CSharp_LibWrapper_Binary.zip|Download DHHalLib CSharp Demo Wrapper App Binary File]]

==== WEC7 binary BSP ====
* [[media:2016-05-19_DHCOM_iMX6_BSP_BIN.zip|Download WEC7 binary BSP (date: 2016-05-19)]]

==== WEC2013 DHHalLib.dll (function library) ====
* [[media:DHHalLib_WEC2013_R12_2021-10-01.zip|Download DHHalLib Library Version 1.4.2.2]]
* [[media:DHHalLib_Test_App_Source_WEC2013_R07_2018_06_12.zip|DHHalLib Demo App Source Code ]]
* [[media:DHHalLib_Test_App_Binary_WEC2013_R09_2021-10-01.zip|DHHalLib Demo App Binary File]]
* [[media:CSharp_LibWrapper_Source_WEC2013_R07_2021-10-01.zip|Download DHHalLib CSharp Wrapper]]
* [[media:CSharp_DHHalLib_Wrapper_App_Source_WEC2013_R05_2017_08_08.zip|DHHalLib C# Demo App Source Code]]
* [[media:CSharp_DHHalLib_Wrapper_App_Binary_WEC2013_R05_2017_08_08.zip|DHHalLib C# Demo App Binary File]]

File:PCN DHCOM-iMX6-015 R01 2026-04-10.pdf

2026-04-15T05:56:14Z

Ageisreiter:

DHCOM iMX6ULL-D2

2026-04-15T05:53:16Z

Ageisreiter: /* DHCOM i.MX6ULL */

{|
|
|
|-
|rowspan="2"|__TOC__
|style="padding-left:100px"|[[Image:IMX6ULL_DHCOR_Modul.png|320px|DHCOR i.MX6ULL-LG]]
|-
|[[Image:IMX6ULLModul.png|600px|DHCOM iMX6ULL-D2]]
|}

== Scope ==
'''This is also the right page for the DHCOR module, because DHCOM is the reference design for the DHCOR module.'''

== Hardware ==
{| class="wikitable" align="center" | style="width: 100%; color: #000000; background: #f3f3f3;" valign="top" |
|-
| style="width: 50%; background: #076b8d; border: 0pt;" |
| style="width: 50%; background: #076b8d; border: 0pt;" |
|-
|valign="top" style="border: 0pt;" |
* '''Cortex-A7 NXP i.MX6ULL up to 900 MHz'''
* 128 - 1024 MByte NAND flash memory (8 bit bus width) or 4 - 16 GByte eMMC flash (8 bit bus width)
* 2 MB SPI boot flash
* 128 - 1024 MByte DDR3-400
* On module microSD card socket (4 bit SDIO) [1]
* LC display controller, 18 bit colors, 1366x768 pixels
* On-chip touch controller for 4-wire resistive touch screens
* 2x Ethernet controller 10/100 Mbit, IEEE1588 conform [2]
* USB 2.0 OTG high-speed
* USB 2.0 host high speed
* 2x Standard UART with hardware handshake support [3][4]
* WiFi iEEE802.11b/g/n + Bluetooth v4.1 (BR/EDR/BLE) module on BGA [1][4]
 [1] On module microSD card socket is only available if WiFi is not mounted.
 [2] The second SPI is only available, if the second ethernet is not mounted.
 [3] CTS and RTS of the first UART is only available if second CAN port is not connected.
 [4] The second UART is only available if Bluetooth is not used. This means WiFi/BT module 1DX is not mounted or module 1FX (only WiFi) is mounted.
 [5] I²S lines are shared with JTAG.
|valign="top" style="border: 0pt;" |
* 2x CAN interface [3]
* 2x SPI interface [2]
* 2x I²C interface
* I²S Audio codec (1 x microphone, 1 x Line in, 1x Line out) [5]
* Real-time clock (I²C connection), low power temperature compensated
* 2x 10 bit analog input (I²C connection)
* 2x 256 Bytes EEPROM with integrated MAC address
* PWM channel
* 22 GPIOs (A-U + INT_HI_PRIO)
* JTAG debug connection via FFC plug connector
* Industrial temperature range (-40°C to +85°C)
* SODIMM-200 socket with DHCOM pin assignment
|}

*[[COM iMX6ULL Hardware|Hardware Support]]

== Product Change Notifications (PCN) ==
==== DHCOR i.MX6ULL ====
* [[media:PCN_DHCOR-iMX6ULL-001_R01_2020-02-18.pdf|PCN_DHCOR-iMX6ULL-001_R01_2020-02-18.pdf (IMX_THERMAL)]]
* [[media:PCN_DHCOR-iMX6ULL-002_R01_2020-02-18.pdf|PCN_DHCOR-iMX6ULL-002_R01_2020-02-18.pdf (SPEED_GRADING)]]
* [[media:PCN_DHCOR-iMX6ULL-003_R01_2020-02-18.pdf|PCN_DHCOR-iMX6ULL-003_R01_2020-02-18.pdf (Bootloader on eMMC)]]
* [[media:PCN_DHCOR-iMX6ULL-004_R01_2020-09-17.pdf|PCN_DHCOR-iMX6ULL-004_R01_2020-09-17.pdf (900MHz undervolt)]]
* [[media:PCN_DHCOR-iMX6ULL-005_R01_2021-05-05.pdf|PCN_DHCOR-iMX6ULL-005_R01_2021-05-05.pdf (VDD_SOC_CAP capacitor)]]
* [[media:PCN_DHCOR-iMX6ULL-006_R02_2021-05-10.pdf|PCN_DHCOR-iMX6ULL-006_R02_2021-05-10.pdf (PMIC buck converter mode)]]
* [[media:PCN_DHCOR-iMX6ULL-007_R01_2021-07-28.pdf|PCN_DHCOR-iMX6ULL-007_R01_2021-07-28.pdf (Change of PCB)]]
* [[media:PCN_DHCOR-iMX6ULL-008_R01_2025-11-19.pdf|PCN_DHCOR-iMX6ULL-008_R01_2025-11-19.pdf (muRata 1DX EOL)]]

==== DHCOM i.MX6ULL ====
* [[media:PCN_DHCOM-iMX6ULL-001_R01_2021-12-23.pdf|PCN_DHCOM-iMX6ULL-001_R01_2021-12-23.pdf (microSD socket EOL)]]
* [[media:PCN_DHCOM-iMX6ULL-002_R02_2026-04-10.pdf|PCN_DHCOM-iMX6ULL-002_R02_2026-04-10.pdf (4Gbyte eMMC Samsung)]]

== Software Support ==
*[[COM iMX6ULL Bootloader U-Boot|i.MX6ULL: Bootloader U-Boot]]
*[[COM iMX6ULL Linux|i.MX6ULL: Linux]]
*[[DHCOM Update Mechanism|DHCOM Update Mechanism]]
*[[Yocto | Yocto on DHCOM]]

== BSP Sources==
==== [https://www.denx.de/wiki/U-Boot U-Boot] ====
* [https://github.com/dh-electronics/u-boot-imx6qdl/tree/dev/2018.05_dhcom DH U-Boot (based on v2018.05)]

==== [https://www.kernel.org Linux Kernel] ====
* Mainline
:* [https://github.com/dh-electronics/linux-imx6qdl/tree/release/5.10.131_dhsom/20220725 DH 5.10.131 Release 2022-07-25]

== Download binaries/images ==
==== U-Boot (for eMMC DHCOMs) ====
* [[media:U-boot-with-spl_imx6ull_2018.05-DH_v1.3_emmc-g9725d01f82.imx|DH U-Boot v1.3 (based on v2018.05)]]
: More on how to program it with the U-Boot command "update bootloader ..." on the page [[DHCOM Update Mechanism#Commandline Mode|"DHCOM Update Mechanism"]]

==== Update Kernel ====
* Please contact DH electronics if you need a binary.
: More on how to use it on the page [[DHCOM Update Mechanism|"DHCOM Update Mechanism"]]

==== Debian based images ====
* Debian 10 "Buster" + Kernel 5.10.131 Release 2022-08-19

:* [[media:HD00051_2022-08-19_imx6ull_buster_sdcard_2000MB.img.xz|SD card: 2GB image (xz compressed)]]
:: Open it with Disks by double click on Debian Linux. Use [https://www.balena.io/etcher balenaEtcher] on Windows.

:* [[media:HD00051_2022-08-19_imx6ull_buster_USB_stick_update.zip|eMMC: USB stick update image]]
:: Extract the files on a USB stick (MBR / FAT32) and insert it into your board / device. More about the files on the page [[DHCOM Update Mechanism|"DHCOM Update Mechanism"]]

Hint: You can also progam the eMMC by using the [[COM iMX6ULL Bootloader U-Boot#USB Mass Storage|U-Boot command "ums"]] (usable since U-Boot v2018.05)

File:PCN DHCOM-iMX6ULL-002 R02 2026-04-10.pdf

2026-04-15T05:52:46Z

Ageisreiter:

DHCOM STM32MP1-D2

2026-04-15T05:50:18Z

Ageisreiter: /* Product Change Notifications (PCN) */

{|
|
|
|-
|__TOC__
|[[Image:DHCOM STM32MP1 Pers medres.jpg|600px|DHCOM STM32MP1-D2]]
|}

== Hardware ==

{| class="wikitable" align="center" | style="width: 100%; color: #000000; background: #f3f3f3;" valign="top" |
|-
| style="width: 50%; background: #076b8d; border: 0pt;" |
| style="width: 50%; background: #076b8d; border: 0pt;" |
|-
|valign="top" style="border: 0pt;" |
* '''Dual ARM Cortex®-A7 up to 650 MHz and Single ARM Cortex®-M4 up to 209 MHz'''
* 3D GPU OpenGL® ES2.0 up to 533 MHz, Power Management: STPMIC1A
* TrustZone, cryptography, hash, secure boot
* DDR3L: 256 / 512 / 1024 Mbyte (32 bit)
* eMMC flash: 4 / 8 / 16 GB
* 2 MByte SPI boot flash
* 256 byte EEPROM
* WiFi / Bluetooth: WiFi IEEE 802.11 a/b/g/n, 802.11j (hosted mode) with dual band, Bluetooth® v5.0 (BR/EDR/BLE), PCB antenna and U.FL antenna connector
* On-board microSD card socket
* RTC with temperature compensation ± 3.0 ppm between -40 to +85°C
* Supply voltage range: 3.3 or 5.0 VDC / typ. 1 W-1.5 W (without WiFi/BT)
* Industrial temperature range (-40°C to +85°C)
* SODIMM-200 socket with DHCOM pin assignment
* JTAG debug connection via FFC plug connector or Tag-Connect
* Bus interface: 16 bit asynchron address/data bus, 1 CS
* Ethernet 1: 10 / 100 Mbit with PHY, IEEE 1588v2
* Ethernet 2: 10 / 100 Mbit with PHY
* MMC/SD interface: 4 bit mode
|valign="top" style="border: 0pt;" |
* CAN 1: V2.0B and CAN FD V1.0, TTCAN (time triggered)
* CAN 2: V2.0B and CAN FD V1.0
* UART 1: Rx / Tx / Rts / Cts, up to 12.5 Mbit/s
* UART 2: Rx / Tx / Rts / Cts, up to 12.5 Mbit/s
* UART 3: Rx / Tx, up to 12.5 Mbit/s
* SPI 1: max. 50 Mbit/s
* I2C 1: max. 1 Mbit/s
* I2C 2: max. 1 Mbit/s
* USB host 1: High-Speed
* USB OTG: High-Speed
* Parallel camera: 10 bit interface up to 140 Mbytes/s
* Display RGB: Max. 1366 x 768 pixels, 24 bit
* MIPI®-DSI 2 data lanes up to 1 GHz each
* Touch: 4-wire
* I²S Audio interface
* GPIOs: 24 IOs
* PWM: 1x 16 bit
* Analog: 4x 16 bit ADC and 2x 12 bit DAC
|}

*[[DHCOM STM32MP1 Hardware|Hardware Support]]

== Product Change Notifications (PCN) ==
* [[media:PCN_DHCOM-STM32MP1-001_R01_2020-10-29.pdf|PCN_DHCOM-STM32MP1-001_R01_2020-10-29.pdf (high speed microSD switch EOL)]]
* [[media:PCN_DHCOM-STM32MP1-002_R01_2021-12-23.pdf|PCN_DHCOM-STM32MP1-002_R01_2021-12-23.pdf (microSD socket EOL)]]
* [[media:PCN_DHCOM-STM32MP15-003_R01_2023-05-22.pdf|PCN_DHCOM-STM32MP15-003_R01_2023-05-22.pdf (U-Boot Update)]]
* [[media:PCN_DHCOM-STM32MP15-004_R01_2024-05-15.pdf|PCN_DHCOM-STM32MP15-004_R01_2024-05-15.pdf (SPI flash write-protect information)]]
* [[media:PCN_DHCOM-STM32MP15-005_R01_2024-06-24.pdf|PCN_DHCOM-STM32MP15-005_R01_2024-06-24.pdf (U-Boot Update)]]
* [[media:PCN_DHCOM-STM32MP15-006_R02_2026-04-10.pdf|PCN_DHCOM-STM32MP15-006_R02_2026-04-10.pdf (4Gbyte eMMC Samsung)]]
* [[media:PCN_DHCOM-STM32MP15-007_R02_2026-04-10.pdf|PCN_DHCOM-STM32MP15-007_R02_2026-04-10.pdf (8Gbyte eMMC WD SDINBDG4-8G alternative)]]

== Software Support ==
*[[DHCOM STM32MP1 Bootloader U-Boot|STM32MP1: Bootloader U-Boot]]
*[[DHCOM STM32MP1 Linux|STM32MP1: Linux]]
*[[Debugging_M4_on_STM32MP15xxxx|STM32MP1: Debugging M4]]
*[[Add Yocto SDK with QT5 to QT Creator | Start with Qt]]
*[[U-Boot recovery for STM32MP1 DHSOM via DFU |U-Boot recovery for STM32MP1 DHSOM via DFU]]
*[[DHCOM STM32MP15 Secure Boot | Secure Boot]]

== BSP Sources ==
==== [https://www.denx.de/wiki/U-Boot U-Boot] ====
* [https://github.com/dh-electronics/u-boot-stm32mp1/tree/v2022.07_testbench U-Boot (based on v2022.07)]

==== [https://www.kernel.org Linux Kernel and Yocto] ====
* Mainline
* [https://github.com/dh-electronics/meta-dhsom-stm32-bsp Yocto BSP meta layer --> Github]
* [https://github.com/dh-electronics/kas-dhsom Easy Yocto build via KAS --> Github]

== Download binaries/images ==
=== PDK2 ===
* [[media:Dh-image-demo-dh-stm32mp1-dhcom-pdk2-20211021081919_2021-10-21.rootfs.wic.xz|DH Yocto based Starter Image 2021-10-21 (based on 5.10 kernel)]]
* [[media:HD00066_Debian-Buster-PDK2_2021-11-03.img.gz|DH Debian Starter Image 2021-11-03 (based on 5.10 kernel)]]
=== DRC02 ===
* [[media:Dh-image-demo-dh-stm32mp1-dhcom-drc02-20211021085758_2021-10-11.rootfs.wic.xz|DH Yocto based Starter Image 2021-10-11 (based on 5.10 kernel)]]
* [[media:HD00066_Debian-Buster-DRC02_2021-11-02.img.gz|DH Debian Starter Image 2021-11-02 (based on 5.10 kernel)]]
=== picoITX ===
* [[media:Dh-image-demo-dh-stm32mp1-dhcom-picoitx_2021-10-21.wic.xz|DH Yocto based Starter Image 2021-10-21 (based on 5.10 kernel)]]
* [[media:DH00066_Debian-Buster-picoITX_2022-01-03.img.gz|DH Debian Starter Image 2022-01-03 (based on 5.10 kernel)]]

File:PCN DHCOM-STM32MP15-007 R02 2026-04-10.pdf

2026-04-15T05:49:43Z

Ageisreiter:

DHCOM STM32MP1-D2

2026-04-14T10:55:15Z

Ageisreiter: /* Product Change Notifications (PCN) */

{|
|
|
|-
|__TOC__
|[[Image:DHCOM STM32MP1 Pers medres.jpg|600px|DHCOM STM32MP1-D2]]
|}

== Hardware ==

{| class="wikitable" align="center" | style="width: 100%; color: #000000; background: #f3f3f3;" valign="top" |
|-
| style="width: 50%; background: #076b8d; border: 0pt;" |
| style="width: 50%; background: #076b8d; border: 0pt;" |
|-
|valign="top" style="border: 0pt;" |
* '''Dual ARM Cortex®-A7 up to 650 MHz and Single ARM Cortex®-M4 up to 209 MHz'''
* 3D GPU OpenGL® ES2.0 up to 533 MHz, Power Management: STPMIC1A
* TrustZone, cryptography, hash, secure boot
* DDR3L: 256 / 512 / 1024 Mbyte (32 bit)
* eMMC flash: 4 / 8 / 16 GB
* 2 MByte SPI boot flash
* 256 byte EEPROM
* WiFi / Bluetooth: WiFi IEEE 802.11 a/b/g/n, 802.11j (hosted mode) with dual band, Bluetooth® v5.0 (BR/EDR/BLE), PCB antenna and U.FL antenna connector
* On-board microSD card socket
* RTC with temperature compensation ± 3.0 ppm between -40 to +85°C
* Supply voltage range: 3.3 or 5.0 VDC / typ. 1 W-1.5 W (without WiFi/BT)
* Industrial temperature range (-40°C to +85°C)
* SODIMM-200 socket with DHCOM pin assignment
* JTAG debug connection via FFC plug connector or Tag-Connect
* Bus interface: 16 bit asynchron address/data bus, 1 CS
* Ethernet 1: 10 / 100 Mbit with PHY, IEEE 1588v2
* Ethernet 2: 10 / 100 Mbit with PHY
* MMC/SD interface: 4 bit mode
|valign="top" style="border: 0pt;" |
* CAN 1: V2.0B and CAN FD V1.0, TTCAN (time triggered)
* CAN 2: V2.0B and CAN FD V1.0
* UART 1: Rx / Tx / Rts / Cts, up to 12.5 Mbit/s
* UART 2: Rx / Tx / Rts / Cts, up to 12.5 Mbit/s
* UART 3: Rx / Tx, up to 12.5 Mbit/s
* SPI 1: max. 50 Mbit/s
* I2C 1: max. 1 Mbit/s
* I2C 2: max. 1 Mbit/s
* USB host 1: High-Speed
* USB OTG: High-Speed
* Parallel camera: 10 bit interface up to 140 Mbytes/s
* Display RGB: Max. 1366 x 768 pixels, 24 bit
* MIPI®-DSI 2 data lanes up to 1 GHz each
* Touch: 4-wire
* I²S Audio interface
* GPIOs: 24 IOs
* PWM: 1x 16 bit
* Analog: 4x 16 bit ADC and 2x 12 bit DAC
|}

*[[DHCOM STM32MP1 Hardware|Hardware Support]]

== Product Change Notifications (PCN) ==
* [[media:PCN_DHCOM-STM32MP1-001_R01_2020-10-29.pdf|PCN_DHCOM-STM32MP1-001_R01_2020-10-29.pdf (high speed microSD switch EOL)]]
* [[media:PCN_DHCOM-STM32MP1-002_R01_2021-12-23.pdf|PCN_DHCOM-STM32MP1-002_R01_2021-12-23.pdf (microSD socket EOL)]]
* [[media:PCN_DHCOM-STM32MP15-003_R01_2023-05-22.pdf|PCN_DHCOM-STM32MP15-003_R01_2023-05-22.pdf (U-Boot Update)]]
* [[media:PCN_DHCOM-STM32MP15-004_R01_2024-05-15.pdf|PCN_DHCOM-STM32MP15-004_R01_2024-05-15.pdf (SPI flash write-protect information)]]
* [[media:PCN_DHCOM-STM32MP15-005_R01_2024-06-24.pdf|PCN_DHCOM-STM32MP15-005_R01_2024-06-24.pdf (U-Boot Update)]]
* [[media:PCN_DHCOM-STM32MP15-006_R02_2026-04-10.pdf|PCN_DHCOM-STM32MP15-006_R02_2026-04-10.pdf (4Gbyte eMMC Samsung)]]
* [[media:PCN_DHCOM-STM32MP15-007_R01_2025-11-10.pdf|PCN_DHCOM-STM32MP15-007_R01_2025-11-10.pdf (8Gbyte eMMC WD SDINBDG4-8G alternative)]]

== Software Support ==
*[[DHCOM STM32MP1 Bootloader U-Boot|STM32MP1: Bootloader U-Boot]]
*[[DHCOM STM32MP1 Linux|STM32MP1: Linux]]
*[[Debugging_M4_on_STM32MP15xxxx|STM32MP1: Debugging M4]]
*[[Add Yocto SDK with QT5 to QT Creator | Start with Qt]]
*[[U-Boot recovery for STM32MP1 DHSOM via DFU |U-Boot recovery for STM32MP1 DHSOM via DFU]]
*[[DHCOM STM32MP15 Secure Boot | Secure Boot]]

== BSP Sources ==
==== [https://www.denx.de/wiki/U-Boot U-Boot] ====
* [https://github.com/dh-electronics/u-boot-stm32mp1/tree/v2022.07_testbench U-Boot (based on v2022.07)]

==== [https://www.kernel.org Linux Kernel and Yocto] ====
* Mainline
* [https://github.com/dh-electronics/meta-dhsom-stm32-bsp Yocto BSP meta layer --> Github]
* [https://github.com/dh-electronics/kas-dhsom Easy Yocto build via KAS --> Github]

== Download binaries/images ==
=== PDK2 ===
* [[media:Dh-image-demo-dh-stm32mp1-dhcom-pdk2-20211021081919_2021-10-21.rootfs.wic.xz|DH Yocto based Starter Image 2021-10-21 (based on 5.10 kernel)]]
* [[media:HD00066_Debian-Buster-PDK2_2021-11-03.img.gz|DH Debian Starter Image 2021-11-03 (based on 5.10 kernel)]]
=== DRC02 ===
* [[media:Dh-image-demo-dh-stm32mp1-dhcom-drc02-20211021085758_2021-10-11.rootfs.wic.xz|DH Yocto based Starter Image 2021-10-11 (based on 5.10 kernel)]]
* [[media:HD00066_Debian-Buster-DRC02_2021-11-02.img.gz|DH Debian Starter Image 2021-11-02 (based on 5.10 kernel)]]
=== picoITX ===
* [[media:Dh-image-demo-dh-stm32mp1-dhcom-picoitx_2021-10-21.wic.xz|DH Yocto based Starter Image 2021-10-21 (based on 5.10 kernel)]]
* [[media:DH00066_Debian-Buster-picoITX_2022-01-03.img.gz|DH Debian Starter Image 2022-01-03 (based on 5.10 kernel)]]

File:PCN DHCOM-STM32MP15-006 R02 2026-04-10.pdf

2026-04-14T10:54:48Z

Ageisreiter:

DHSBC STM32MP13

2026-04-14T10:52:23Z

Ageisreiter: /* Product Change Notifications (PCN) */

'''The DHSBC STM32MP13x board is the official DHCOR STM32MP13 reference design!'''

{|
|
|
|-
|__TOC__
|[[Image:DHCOR-STM32MP13_Top_highres.png|600px|COM Avenger96Board]]
|}

== Introduction ==
Reference design for secure industrial IoT devices based on STM32MP13x

* Single Board Computer based on the solderable DHCOR STM32MP13
* Compatible with accessories from the Raspberry Pi© community
* Highlights: Bluetooth / WiFi, Dual GB Ethernet, Secure Boot, OP-TEE support
* Trusted Platform Module 2.0 available on request
* Mainline Linux support and active software maintenance
* Industrial product design with CE certification
* Guaranteed long-term availability of 10+ years

== Technical Details ==
{| class="wikitable" align="center" | style="width: 100%; color: #000000; background: #f3f3f3;" valign="top" |
|-
| style="width: 50%; background: #076b8d; border: 0pt;" |
| style="width: 50%; background: #076b8d; border: 0pt;" |
|-
|valign="top" style="border: 0pt;" |
* '''STM32MP135F
**1x ARM® Cortex-A7 up to 1 GHz
'''
*'''PMIC''' STPMIC1D
*'''DDR3 DRAM''' 512 Mbyte @ 533 MHz
*'''eMMC Flash''' 4 Gbyte
*'''NOR Flash''' 4 Mbyte, Quad SPI interface
*'''EEPROM''' 4 kbyte
*'''RTC''' temp. compensated RV-3032-C7
*'''USB Host''' 1x type A, 2.0 high-speed
*'''USB Device''' 1x Type-C, 2.0 high-speed
*'''WiFi / Bluetooth'''
**WiFi 2.4GHz IEEE 802.11b / g / n
**Bluetooth® v5.2 (BR/EDR/BLE)
**Antenna: U-FL connector
*'''Ethernet''' 10 / 100 / 1000 Mbit/s, IEEE 802.3-compliant
|valign="top" style="border: 0pt;" |
*'''TPM''' (Trusted Platform Module)2.0 device ST33TPHF2XSPI
*'''Push-Buttons''' Power and reset
*'''Battery Socket''' CR1216, CR1220 and CR1225
*'''Boot Mode''' 3 bit boot mode switch
*'''Debug Interface''' JTAG interface via tag-connect
*'''Supply (SYS_DCIN)''' 8 - 18 VDC
*'''Temperature Range''' 0 - 40 °C
*'''Dimensions ''' 85 x 56 mm
*'''Raspberry Pi 40-pin Expansion'''
**2 x UART
**1 x I2C
**1 x I2S
**1 x SPI
**2 x PWM
**2 x CAN
**up to 28 x GPIOs
|}

== Product Change Notifications (PCN) ==
* [[media:PCN_DHCOR-STM32MP13-001_R02_2026-04-10.pdf|PCN_DHCOR-STM32MP13-001_R02_2026-04-10.pdf (4Gbyte eMMC Samsung)]]

== Downloads ==
* [[media:STM32-linux6_6_scarthgap_dh-stm32mp13-dhcor-dhsbc_meta-dhsom-extras_meta-dhsom-extras-qt6_meta-dhsom-extras-wpe.tar|DH Mainline based starter image 2024-07-03 (based on 6.6 Linux Kernel)]]

== Documentation ==
* [[media:DOC_DHSBC-STM32MP13-Quick-Start-Guide_R04_2025-04-08.pdf|'''NEW''' (for Hardware '''719-300 / HS00047''') Getting-Started with DHSBC STM32MP13 (R04)]]
* [[media:DOC_DHSBC-STM32MP13-Quick-Start-Guide_R03_2024-11-25.pdf|'''OLD''' (for Hardware '''719-100 / HS00035''') Getting-Started with DHSBC STM32MP13 (R03)]]
* [[media:USM DHCOR-STM32MP13 R01 2024-07-12.pdf|DHCOR STM32MP13 User Manual R01 '''IMPORTANT: Please have a look at chapter 26. Hardware design checklist''']]

== Design Files ==
* [[media:SCH_719-100-HS00035-customer_R06_2023-11-16.pdf|DHSBC STM32MP13 Schematic]]
* [[media:SCH_719-300-HS00047-customer-version_R01_2025-01-27.pdf|DHSBC STM32MP13 Schematic --> '''NEW EMI optimized version! Use this as development template!''']]
* [[media:DHSBC-STM32MP13-3D-STEP-719-100_R01_2024-03-07.zip|DHSBC STM32MP13 3D STEP file]]
* [[media:DHCOR-STM32MP13-Symbol-Footprint.zip|DHCOR STM32MP13 Allegro/layout symbol]]
* [[media:DHCOR-STM32MP13-3D-STEP-718-100_R01_2024-03-06.zip|DHCOR STM32MP13 3D STEP file]]

== Software ==
=== DH Mainline based Linux ===
* [https://github.com/dh-electronics/kas-dhsom Build your own Yocto Scarthgap LTS via kas (GitHub)]
* [https://github.com/dh-electronics/meta-dhsom-stm32-bsp Yocto BSP meta layer (Github)]
* [https://github.com/dh-electronics/prebuilt-test-images-dhsom Prebuilt test images for DH electronics DHSOM platforms]
: Note: Please use STM32-linux*_*_'''dh-stm32mp13-dhcor-dhsbc'''_* configuration

== Useful instructions ==
==== Setup new board and install image files via USB (dfu and ums mode) / U-Boot recovery via DFU ====
:[[DHSBC STM32MP13 DFU and UMS usage|DHSBC STM32MP13 DFU and UMS usage]]

==== eMMC boot / The bootloader is stored in the eMMC instead of the SPI boot flash ====
:[https://github.com/dh-electronics/meta-dhsom-stm32-bsp/blob/main/doc/stm32mp13-dhcor-dhsbc.md#operating-system-image-installation-into-emmc-from-linux Operating system image installation into eMMC (from Linux)]

==== How to connect to WiFi network with WPA2 PSK? ====
:'''Establish connection'''
:{| class="wikitable"
|<tt>$ wpa_passphrase "SSID" > /etc/wpa_supplicant.conf</tt>
|}
:-> In the next step, please enter the password
:{| class="wikitable"
|<tt>$ rfkill unblock all</tt>
|-
|<tt>$ ip link set wlansom0 up</tt>
|-
|<tt>$ wpa_supplicant -B -i wlansom0 -c /etc/wpa_supplicant.conf</tt>
|-
|<tt>$ udhcpc -i wlansom0 </tt>
|}
:'''Disconnect'''
:{| class="wikitable"
|<tt>$ ip link set wlansom0 down</tt>
|}

==== Simple Bluetooth test ====
:Bring up bluetooth on the STM32MP13xx DHCOR SoM / DHSBC:
:{| class="wikitable"
|<tt>$ hciconfig hci0 up</tt>
|}

:Make the STM32MP13xx DHCOR SoM / DHSBC discoverable to other BT devices:
:{| class="wikitable"
|<tt>$ hciconfig hci0 piscan</tt>
|}

:Scan for other discoverable devices:
:{| class="wikitable"
|<tt>$ hcitool scan</tt>
|} Scanning ...

:When the scan is now performed on a HostPC, the STM32MP13xx DHCOR SoM / DHSBC should be visible:
:{| class="wikitable"
|<tt>$ hciconfig hci0 up</tt>
|-
|<tt>$ hcitool scan</tt>
|}
:Scanning ...
DC:FE:23:12:34:56 dh-stm32mp13-dhcor-dhsbc

:To generate some traffic on the BT UART between SoC and BT chip, try e.g. L2 ping from hostpc:
:{| class="wikitable"
|<tt> l2ping DC:FE:23:12:34:56</tt>
|}
Ping: DC:FE:23:12:34:56 from E8:48:B8:11:22:33 (data size 44) ...
44 bytes from DC:FE:23:12:34:56 id 0 time 11.44ms
44 bytes from DC:FE:23:12:34:56 id 1 time 39.83ms
44 bytes from DC:FE:23:12:34:56 id 2 time 39.25ms ...

:An interesting option to l2ping is -f, flood ping, which sends a lot of packets, that means a lot more traffic too:
:{| class="wikitable"
|<tt> l2ping -f DC:FE:23:12:34:56</tt>
|}

==== Add support for joy-it RB-TFT3.2V2 SPI display====
:[[Image:DHSBC-STM32MP13-with-SPI-Display.png|300px]]
:Add Device Tree oeverlay to u-boot.
:{| class="wikitable"
|<tt>=> setenv loaddtos '#conf-stm32mp135f-dhcor-dhsbc.dtb#conf-stm32mp13xx-dhcor-dhsbc-overlay-rb-tft32-v2.dtbo'</tt>
|-
|<tt>=> saveenv </tt>
|-
|<tt>=> saveenv </tt>
|}
* [https://joy-it.net/en/products/RB-TFT3.2V2 Link: joy-it RB-TFT3.2V2]

==== Year 2038 problem with 32-bit systems ====
:'''How can the problem be solved?'''
:- Linux kernel - disable COMPAT_32BIT_TIME and fix whatever broken userspace you might still have. This disables backward compatibility syscalls which use 32bit time_t and which will surely break in 2038.
:- Userspace/OE - Keep an eye on OE QA failures flagged with "32bit-time" which indicate use of 32 bit time_t . Fix your recipes and upstream the changes.
:- Filesystems - Avoid ext2 and ext3, they are always affected by Y2038. Avoid ext4 with small inode size, less than 256 Bytes inodes are affected. Use ext4 with inodes larger than 256 Bytes.
:- Testing - See OE-core meta/conf/distro/include/time64.inc as a good starting point for simulating Y2038 in QEMU. Test real HW as well, set time past 2038 and especially test updates, see if TLS certificates survive or there is a roll-over of some sort, which would break update-ability in field after 2038. Note that wrong system time, set in far past, can also make the SSL library reject certificates.

== Links ==
* [https://www.dh-electronics.com/embedded-produkte/dhsom/detail/dhcor-stm32mp13 DH DHCOR STM32MP13]
* [https://www.dh-electronics.com/embedded-produkte/development-carrier-boards/detail/dhsbc-stm32mp13 DH DHSBC STM32MP13]
* [https://wiki.st.com/stm32mpu/wiki/Main_Page STM32 MPU wiki]
* [https://wiki.st.com/stm32mpu/wiki/Category:Device_tree_configuration STM32 MPU wiki - Device tree configuration]
* [https://wiki.st.com/stm32mpu/wiki/STM32MP13_resources STM32MP13 resources]

File:PCN DHCOR-STM32MP13-001 R02 2026-04-10.pdf

2026-04-14T10:51:48Z

Ageisreiter:

DHSBC STM32MP2x

2026-03-23T06:34:13Z

Ageisreiter: /* Product Change Notifications (PCN) */

'''The DHSBC STM32MP25 board is the official DHCOS STM32MP25x reference design!'''

{|
|
|
|-
|__TOC__
|[[Image:DHSBC_STM32MP2-Top-medres.jpg|600px|DHSBC STM32MP2]]
|}

== Introduction ==
Reference design for secure industrial IoT devices based on STM32MP25

* Single Board Computer based on solderable, pin-compatible DHCOS STM32MP25 SOM
* Industrial grade, 10+ years available
* Mainline Linux support (also for Vivante GPU)
* Security Features e.g. Secure Boot / Storage
* Connectivity: Gbit Ethernet, WiFi/BT
* Multimedia: 3D GPU, display, video, camera
* STPMIC25 supports low power modes

== Technical Details ==
{| class="wikitable" align="center" | style="width: 100%; color: #000000; background: #f3f3f3;" valign="top" |
|-
| style="width: 50%; background: #076b8d; border: 0pt;" |
| style="width: 50%; background: #076b8d; border: 0pt;" |
|-
|valign="top" style="border: 0pt;" |
* '''STM32MP255C
**2x ARM Cortex-A35 with 1.2 GHz
**1x ARM Cortex-M33 up to 400 MHz
'''
*'''PMIC''' STPMIC25D
*'''LPDDR4 32-bit''' 4 Gbyte @ 1200 MHz
*'''eMMC Flash''' 16 Gbyte
*'''NOR Flash''' 4 Mbyte, Quad SPI interface
*'''EEPROM''' 4 kbyte
*'''microSD socket'''
*'''RTC''' temp. compensated RV-3032-C7
*'''USB Host''' 1x type A, 2.0 high-speed
*'''USB Type-C''' 1x USB-C 3.2 Gen 1x1 with DisplayPort alt. mode support
*'''WiFi / Bluetooth'''
**Tri band 2.4 GHz, 5 GHz and 6 GHz for IEEE802.11a/b/g/n/ac/ax
**Bluetooth® v5.4 BR/EDR/LE
**Antenna: U-FL connector
*'''Ethernet''' 2x 10 / 100 / 1000 Mbit/s, IEEE 802.3-compliant
|valign="top" style="border: 0pt;" |
*'''LVDS''' 1x Dual Link, 2x 4-lane LVDS connector
*'''MIPI-CSI2''' 1x 2-lanes connector
*'''TPM''' (Trusted Platform Module)2.0 device ST33KTPM2I
*'''Push-Buttons''' Power and reset
*'''Battery Socket''' CR1216, CR1220 and CR1225
*'''Boot Mode''' 4 bit boot mode switch
*'''Debug Interface''' JTAG interface via tag-connect
*'''Supply''' 5 VDC, USB Type-C power supply port
*'''Dimensions ''' 85 x 56 mm
*'''Raspberry Pi 40-pin Expansion'''
**2 x UART
**1 x I2C
**1 x I2S
**1 x SPI
**2 x PWM
**2 x CAN
**up to 28 x GPIOs
|}

== Product Change Notifications (PCN) ==
* [[media:PCN_DHCOS-STM32MP2-001_R01_2026-03-23.pdf|PCN_DHCOS-STM32MP2-001_R01_2026-03-23.pdf (16Gbyte eMMC ACON poor availability)]]

== IMPORTANT INFORMATIONS ==
* '''The DHSBC DisplayPort functionality has not yet been implemented at this time. The test image is a headless image. If you want to connect a display, please contact DH electronics. We can offer a 10" LVDS test kit, or you can connect your own LVDS display and we will assist with implementation.'''

== Documentation ==
* [[media:DOC_DHSBC-STM32MP25-Quick-Start-Guide_R01_2025-09-11.pdf|Getting-Started with DHSBC STM32MP25]]
* DHCOS STM32MP2x User Manual: * [https://www.dh-electronics.com/en/embedded-products/dhsom/detail/dhcos-stm32mp2 DHCOS STM32MP2 product page --> DOWNLOADS]
* '''OLD --> See homepage for the latest version of the user manual''' [[media:USM_DHCOS-STM32MP2x-preliminary_2025-05-27.pdf|DHCOS STM32MP2x User Manual '''IMPORTANT: Please have a look at chapter 27. Hardware design checklist''']]

== Design Files ==
* [[media:SCH_739-100-HS00048-customer-preliminary_R03_2025-03-27.pdf|DHSBC STM32MP25 Schematic]]
* [[media:DHCOS-STM32MP2-3D-STEP-736-100_R01_2025-03-25.zip|DHCOS STM32MP2x 3D STEP file]]
* [[media:DHSBC-STM32MP2-3D-STEP-739-100-R01 2025-09-12.zip|DHSBC STM32MP2 3D STEP file]]

== Software ==
* [https://github.com/dh-electronics/kas-dhsom Build your own Yocto LTS via kas (GitHub)]
: Note: Please use dh-stm32mp25-dhcos-dhsbc.yml configuration.
* [https://github.com/dh-electronics/meta-dhsom-stm32-wip-bsp Yocto BSP meta layer (Github)]
: Note: Currently, for the DHCOS STM32MP2, we use the 'meta-dhsom-stm32-wip-bsp' (work in progress) layer. The STM32MP2 will later be integrated into the meta-dhsom-stm32-bsp layer.
* [https://github.com/dh-electronics/prebuilt-test-images-dhsom Prebuilt test images for DH electronics DHSOM platforms]
: Note: Please use STM32-linux*_*_'''dh-stm32mp25-dhcos-dhsbc'''_* configuration

== Useful instructions ==
==== Setup new board and install image files via USB (dfu and ums mode) / U-Boot recovery via DFU ====
*[[DHSBC STM32MP2 DFU and UMS usage|DHSBC STM32MP2 DFU and UMS usage]]

==== How to connect to WiFi network ====
:'''Establish connection'''
:{| class="wikitable"
|<tt>$ wpa_passphrase "SSID" > /etc/wpa_supplicant.conf</tt>
|}
:-> In the next step, please enter the password
:{| class="wikitable"
|<tt>$ rfkill unblock all</tt>
|-
|<tt>$ wpa_supplicant -B -i wlansom0 -c /etc/wpa_supplicant.conf</tt>
|}
:'''Disconnect'''
:{| class="wikitable"
|<tt>$ ip link set wlansom0 down</tt>
|}
==== Use GPIOs ====
:'''To list available GPIOs, use the gpioinfo command:'''
:{| class="wikitable"
|<tt>$ gpioinfo</tt>
|}
gpiochip0 - 16 lines:
line 0: "DHSBC_HW-CODE_0" input consumer="kernel"
line 1: "DHSBC_HW-CODE_1" input
line 2: "DHSBC_HW-CODE_2" input
line 3: "PA3" input
line 4: "DHCOS-E" input
line 5: "DHCOS-J" input
line 6: "PA6" input
line 7: "PA7" input
...

:'''To set a GPIO as Output-High:'''
:{| class="wikitable"
|<tt>$ gpioset "LABLE"=1</tt>
|}

:'''To set a GPIO as Output-Low:'''
:{| class="wikitable"
|<tt>$ gpioset "LABLE"=0</tt>
|}

:'''To get current state of a GPIO:'''
:{| class="wikitable"
|<tt>$ gpioget "LABLE"</tt>
|}

==== Configure systemd network configuration ====
:'''Find configuration files:'''
:{| class="wikitable"
|<tt>find /usr -name \*wlansom0\*</tt>
|-
|<tt>find /usr -name \*ethsom0\*</tt>
|-
|<tt>find /usr -name \*ethsom1\*</tt>
|}

:'''systemd network configuration:'''
* [https://wiki.archlinux.org/title/Systemd-networkd systemd-networkd documentation]
* [https://www.freedesktop.org/software/systemd/man/latest/systemd.network.html systemd.network — Network configuration]

== Links ==
* [https://www.dh-electronics.com/en/embedded-products/dhsom/detail/dhcos-stm32mp2x DH DHCOS STM32MP2x]
* [https://www.dh-electronics.com/en/embedded-products/development-carrier-boards/detail/dhsbc-stm32mp25 DH DHSBC STM32MP25]
* [https://wiki.st.com/stm32mpu/wiki/Main_Page STM32 MPU wiki]
* [https://wiki.st.com/stm32mpu/wiki/STM32MP23_resources STM32MP23 resources]
* [https://wiki.st.com/stm32mpu/wiki/STM32MP25_resources STM32MP25 resources]

File:PCN DHCOS-STM32MP2-001 R01 2026-03-23.pdf

2026-03-23T06:33:12Z

Ageisreiter:

DHCOM iMX8-D2

2026-03-09T07:33:22Z

Ageisreiter: /* Product Change Notifications (PCN) */

{|
|
|
|-
|__TOC__
|[[Image:DHCOM-iMX8N_Plus_pers_medres.jpg|600px|DHCOM iMX8-D2]]
|}

== Hardware ==

{| class="wikitable" align="center" | style="width: 100%; color: #000000; background: #f3f3f3;" valign="top" |
|-
| style="width: 50%; background: #076b8d; border: 0pt;" |
| style="width: 50%; background: #076b8d; border: 0pt;" |
|-
|valign="top" style="border: 0pt;" |
* '''Quad Cortex-A53 processor NXP i.MX8M-Plus up to 1.8GHz'''
* Real-time control, machine learning, AI, advanced multimedia, industrial automation.
* NPU with up to 2.3 TOPS enables matrix calculations e.g. for pattern, speech, object recognition
* Advanced image and video processing via video encoding and decoding
* Compatible with other modules from the DHCOM family (SODIMM-200 socket)
* No heat sink necessary thanks to 5-Cent Cooling Solution
* Guaranteed long-term availability of 10+ years
|}

*[[COM iMX8 Hardware|Hardware Support]]

== Product Change Notifications (PCN) ==
* [[media:PCN_DHCOM-i.MX8MP-001_R01_2026-03-09.pdf|PCN_DHCOM-i.MX8MP-001_R01_2026-03-09.pdf (16GByte eMMC EOL or poor available)]]
* [[media:PCN_DHCOM-i.MX8MP-002_R01_2025-11-04.pdf|PCN_DHCOM-i.MX8MP-002_R01_2025-11-04.pdf (32GByte eMMC EOL)]]

== Software ==
* [https://github.com/dh-electronics/meta-dhsom-imx-bsp Yocto BSP meta layer --> Github]
* [https://github.com/dh-electronics/kas-dhsom Easy Yocto build via KAS --> Github]

File:PCN DHCOM-i.MX8MP-001 R01 2026-03-09.pdf

2026-03-09T07:32:08Z

Ageisreiter:

DHCOM iMX8-D2

2026-02-18T13:18:04Z

Ageisreiter: /* Product Change Notifications (PCN) */

{|
|
|
|-
|__TOC__
|[[Image:DHCOM-iMX8N_Plus_pers_medres.jpg|600px|DHCOM iMX8-D2]]
|}

== Hardware ==

{| class="wikitable" align="center" | style="width: 100%; color: #000000; background: #f3f3f3;" valign="top" |
|-
| style="width: 50%; background: #076b8d; border: 0pt;" |
| style="width: 50%; background: #076b8d; border: 0pt;" |
|-
|valign="top" style="border: 0pt;" |
* '''Quad Cortex-A53 processor NXP i.MX8M-Plus up to 1.8GHz'''
* Real-time control, machine learning, AI, advanced multimedia, industrial automation.
* NPU with up to 2.3 TOPS enables matrix calculations e.g. for pattern, speech, object recognition
* Advanced image and video processing via video encoding and decoding
* Compatible with other modules from the DHCOM family (SODIMM-200 socket)
* No heat sink necessary thanks to 5-Cent Cooling Solution
* Guaranteed long-term availability of 10+ years
|}

*[[COM iMX8 Hardware|Hardware Support]]

== Product Change Notifications (PCN) ==
* [[media:PCN_DHCOM-i.MX8MP-002_R01_2025-11-04.pdf|PCN_DHCOM-i.MX8MP-002_R01_2025-11-04.pdf (32GByte eMMC EOL)]]

== Software ==
* [https://github.com/dh-electronics/meta-dhsom-imx-bsp Yocto BSP meta layer --> Github]
* [https://github.com/dh-electronics/kas-dhsom Easy Yocto build via KAS --> Github]

DHSBC STM32MP2x

2026-02-17T08:51:07Z

Ageisreiter: /* Documentation */

'''The DHSBC STM32MP25 board is the official DHCOS STM32MP25x reference design!'''

{|
|
|
|-
|__TOC__
|[[Image:DHSBC_STM32MP2-Top-medres.jpg|600px|DHSBC STM32MP2]]
|}

== Introduction ==
Reference design for secure industrial IoT devices based on STM32MP25

* Single Board Computer based on solderable, pin-compatible DHCOS STM32MP25 SOM
* Industrial grade, 10+ years available
* Mainline Linux support (also for Vivante GPU)
* Security Features e.g. Secure Boot / Storage
* Connectivity: Gbit Ethernet, WiFi/BT
* Multimedia: 3D GPU, display, video, camera
* STPMIC25 supports low power modes

== Technical Details ==
{| class="wikitable" align="center" | style="width: 100%; color: #000000; background: #f3f3f3;" valign="top" |
|-
| style="width: 50%; background: #076b8d; border: 0pt;" |
| style="width: 50%; background: #076b8d; border: 0pt;" |
|-
|valign="top" style="border: 0pt;" |
* '''STM32MP255C
**2x ARM Cortex-A35 with 1.2 GHz
**1x ARM Cortex-M33 up to 400 MHz
'''
*'''PMIC''' STPMIC25D
*'''LPDDR4 32-bit''' 4 Gbyte @ 1200 MHz
*'''eMMC Flash''' 16 Gbyte
*'''NOR Flash''' 4 Mbyte, Quad SPI interface
*'''EEPROM''' 4 kbyte
*'''microSD socket'''
*'''RTC''' temp. compensated RV-3032-C7
*'''USB Host''' 1x type A, 2.0 high-speed
*'''USB Type-C''' 1x USB-C 3.2 Gen 1x1 with DisplayPort alt. mode support
*'''WiFi / Bluetooth'''
**Tri band 2.4 GHz, 5 GHz and 6 GHz for IEEE802.11a/b/g/n/ac/ax
**Bluetooth® v5.4 BR/EDR/LE
**Antenna: U-FL connector
*'''Ethernet''' 2x 10 / 100 / 1000 Mbit/s, IEEE 802.3-compliant
|valign="top" style="border: 0pt;" |
*'''LVDS''' 1x Dual Link, 2x 4-lane LVDS connector
*'''MIPI-CSI2''' 1x 2-lanes connector
*'''TPM''' (Trusted Platform Module)2.0 device ST33KTPM2I
*'''Push-Buttons''' Power and reset
*'''Battery Socket''' CR1216, CR1220 and CR1225
*'''Boot Mode''' 4 bit boot mode switch
*'''Debug Interface''' JTAG interface via tag-connect
*'''Supply''' 5 VDC, USB Type-C power supply port
*'''Dimensions ''' 85 x 56 mm
*'''Raspberry Pi 40-pin Expansion'''
**2 x UART
**1 x I2C
**1 x I2S
**1 x SPI
**2 x PWM
**2 x CAN
**up to 28 x GPIOs
|}

== Product Change Notifications (PCN) ==

== IMPORTANT INFORMATIONS ==
* '''The DHSBC DisplayPort functionality has not yet been implemented at this time. The test image is a headless image. If you want to connect a display, please contact DH electronics. We can offer a 10" LVDS test kit, or you can connect your own LVDS display and we will assist with implementation.'''

== Documentation ==
* [[media:DOC_DHSBC-STM32MP25-Quick-Start-Guide_R01_2025-09-11.pdf|Getting-Started with DHSBC STM32MP25]]
* DHCOS STM32MP2x User Manual: * [https://www.dh-electronics.com/en/embedded-products/dhsom/detail/dhcos-stm32mp2 DHCOS STM32MP2 product page --> DOWNLOADS]
* '''OLD --> See homepage for the latest version of the user manual''' [[media:USM_DHCOS-STM32MP2x-preliminary_2025-05-27.pdf|DHCOS STM32MP2x User Manual '''IMPORTANT: Please have a look at chapter 27. Hardware design checklist''']]

== Design Files ==
* [[media:SCH_739-100-HS00048-customer-preliminary_R03_2025-03-27.pdf|DHSBC STM32MP25 Schematic]]
* [[media:DHCOS-STM32MP2-3D-STEP-736-100_R01_2025-03-25.zip|DHCOS STM32MP2x 3D STEP file]]
* [[media:DHSBC-STM32MP2-3D-STEP-739-100-R01 2025-09-12.zip|DHSBC STM32MP2 3D STEP file]]

== Software ==
* [https://github.com/dh-electronics/kas-dhsom Build your own Yocto LTS via kas (GitHub)]
: Note: Please use dh-stm32mp25-dhcos-dhsbc.yml configuration.
* [https://github.com/dh-electronics/meta-dhsom-stm32-wip-bsp Yocto BSP meta layer (Github)]
: Note: Currently, for the DHCOS STM32MP2, we use the 'meta-dhsom-stm32-wip-bsp' (work in progress) layer. The STM32MP2 will later be integrated into the meta-dhsom-stm32-bsp layer.
* [https://github.com/dh-electronics/prebuilt-test-images-dhsom Prebuilt test images for DH electronics DHSOM platforms]
: Note: Please use STM32-linux*_*_'''dh-stm32mp25-dhcos-dhsbc'''_* configuration

== Useful instructions ==
==== Setup new board and install image files via USB (dfu and ums mode) / U-Boot recovery via DFU ====
*[[DHSBC STM32MP2 DFU and UMS usage|DHSBC STM32MP2 DFU and UMS usage]]

==== How to connect to WiFi network ====
:'''Establish connection'''
:{| class="wikitable"
|<tt>$ wpa_passphrase "SSID" > /etc/wpa_supplicant.conf</tt>
|}
:-> In the next step, please enter the password
:{| class="wikitable"
|<tt>$ rfkill unblock all</tt>
|-
|<tt>$ wpa_supplicant -B -i wlansom0 -c /etc/wpa_supplicant.conf</tt>
|}
:'''Disconnect'''
:{| class="wikitable"
|<tt>$ ip link set wlansom0 down</tt>
|}
==== Use GPIOs ====
:'''To list available GPIOs, use the gpioinfo command:'''
:{| class="wikitable"
|<tt>$ gpioinfo</tt>
|}
gpiochip0 - 16 lines:
line 0: "DHSBC_HW-CODE_0" input consumer="kernel"
line 1: "DHSBC_HW-CODE_1" input
line 2: "DHSBC_HW-CODE_2" input
line 3: "PA3" input
line 4: "DHCOS-E" input
line 5: "DHCOS-J" input
line 6: "PA6" input
line 7: "PA7" input
...

:'''To set a GPIO as Output-High:'''
:{| class="wikitable"
|<tt>$ gpioset "LABLE"=1</tt>
|}

:'''To set a GPIO as Output-Low:'''
:{| class="wikitable"
|<tt>$ gpioset "LABLE"=0</tt>
|}

:'''To get current state of a GPIO:'''
:{| class="wikitable"
|<tt>$ gpioget "LABLE"</tt>
|}

==== Configure systemd network configuration ====
:'''Find configuration files:'''
:{| class="wikitable"
|<tt>find /usr -name \*wlansom0\*</tt>
|-
|<tt>find /usr -name \*ethsom0\*</tt>
|-
|<tt>find /usr -name \*ethsom1\*</tt>
|}

:'''systemd network configuration:'''
* [https://wiki.archlinux.org/title/Systemd-networkd systemd-networkd documentation]
* [https://www.freedesktop.org/software/systemd/man/latest/systemd.network.html systemd.network — Network configuration]

== Links ==
* [https://www.dh-electronics.com/en/embedded-products/dhsom/detail/dhcos-stm32mp2x DH DHCOS STM32MP2x]
* [https://www.dh-electronics.com/en/embedded-products/development-carrier-boards/detail/dhsbc-stm32mp25 DH DHSBC STM32MP25]
* [https://wiki.st.com/stm32mpu/wiki/Main_Page STM32 MPU wiki]
* [https://wiki.st.com/stm32mpu/wiki/STM32MP23_resources STM32MP23 resources]
* [https://wiki.st.com/stm32mpu/wiki/STM32MP25_resources STM32MP25 resources]

DHSBC STM32MP2x

2026-02-17T08:08:16Z

Ageisreiter: /* Documentation */

'''The DHSBC STM32MP25 board is the official DHCOS STM32MP25x reference design!'''

{|
|
|
|-
|__TOC__
|[[Image:DHSBC_STM32MP2-Top-medres.jpg|600px|DHSBC STM32MP2]]
|}

== Introduction ==
Reference design for secure industrial IoT devices based on STM32MP25

* Single Board Computer based on solderable, pin-compatible DHCOS STM32MP25 SOM
* Industrial grade, 10+ years available
* Mainline Linux support (also for Vivante GPU)
* Security Features e.g. Secure Boot / Storage
* Connectivity: Gbit Ethernet, WiFi/BT
* Multimedia: 3D GPU, display, video, camera
* STPMIC25 supports low power modes

== Technical Details ==
{| class="wikitable" align="center" | style="width: 100%; color: #000000; background: #f3f3f3;" valign="top" |
|-
| style="width: 50%; background: #076b8d; border: 0pt;" |
| style="width: 50%; background: #076b8d; border: 0pt;" |
|-
|valign="top" style="border: 0pt;" |
* '''STM32MP255C
**2x ARM Cortex-A35 with 1.2 GHz
**1x ARM Cortex-M33 up to 400 MHz
'''
*'''PMIC''' STPMIC25D
*'''LPDDR4 32-bit''' 4 Gbyte @ 1200 MHz
*'''eMMC Flash''' 16 Gbyte
*'''NOR Flash''' 4 Mbyte, Quad SPI interface
*'''EEPROM''' 4 kbyte
*'''microSD socket'''
*'''RTC''' temp. compensated RV-3032-C7
*'''USB Host''' 1x type A, 2.0 high-speed
*'''USB Type-C''' 1x USB-C 3.2 Gen 1x1 with DisplayPort alt. mode support
*'''WiFi / Bluetooth'''
**Tri band 2.4 GHz, 5 GHz and 6 GHz for IEEE802.11a/b/g/n/ac/ax
**Bluetooth® v5.4 BR/EDR/LE
**Antenna: U-FL connector
*'''Ethernet''' 2x 10 / 100 / 1000 Mbit/s, IEEE 802.3-compliant
|valign="top" style="border: 0pt;" |
*'''LVDS''' 1x Dual Link, 2x 4-lane LVDS connector
*'''MIPI-CSI2''' 1x 2-lanes connector
*'''TPM''' (Trusted Platform Module)2.0 device ST33KTPM2I
*'''Push-Buttons''' Power and reset
*'''Battery Socket''' CR1216, CR1220 and CR1225
*'''Boot Mode''' 4 bit boot mode switch
*'''Debug Interface''' JTAG interface via tag-connect
*'''Supply''' 5 VDC, USB Type-C power supply port
*'''Dimensions ''' 85 x 56 mm
*'''Raspberry Pi 40-pin Expansion'''
**2 x UART
**1 x I2C
**1 x I2S
**1 x SPI
**2 x PWM
**2 x CAN
**up to 28 x GPIOs
|}

== Product Change Notifications (PCN) ==

== IMPORTANT INFORMATIONS ==
* '''The DHSBC DisplayPort functionality has not yet been implemented at this time. The test image is a headless image. If you want to connect a display, please contact DH electronics. We can offer a 10" LVDS test kit, or you can connect your own LVDS display and we will assist with implementation.'''

== Documentation ==
* [[media:DOC_DHSBC-STM32MP25-Quick-Start-Guide_R01_2025-09-11.pdf|Getting-Started with DHSBC STM32MP25]]
* '''OLD --> See homepage for the latest version of the user manual''' [[media:USM_DHCOS-STM32MP2x-preliminary_2025-05-27.pdf|DHCOS STM32MP2x User Manual '''IMPORTANT: Please have a look at chapter 27. Hardware design checklist''']]

== Design Files ==
* [[media:SCH_739-100-HS00048-customer-preliminary_R03_2025-03-27.pdf|DHSBC STM32MP25 Schematic]]
* [[media:DHCOS-STM32MP2-3D-STEP-736-100_R01_2025-03-25.zip|DHCOS STM32MP2x 3D STEP file]]
* [[media:DHSBC-STM32MP2-3D-STEP-739-100-R01 2025-09-12.zip|DHSBC STM32MP2 3D STEP file]]

== Software ==
* [https://github.com/dh-electronics/kas-dhsom Build your own Yocto LTS via kas (GitHub)]
: Note: Please use dh-stm32mp25-dhcos-dhsbc.yml configuration.
* [https://github.com/dh-electronics/meta-dhsom-stm32-wip-bsp Yocto BSP meta layer (Github)]
: Note: Currently, for the DHCOS STM32MP2, we use the 'meta-dhsom-stm32-wip-bsp' (work in progress) layer. The STM32MP2 will later be integrated into the meta-dhsom-stm32-bsp layer.
* [https://github.com/dh-electronics/prebuilt-test-images-dhsom Prebuilt test images for DH electronics DHSOM platforms]
: Note: Please use STM32-linux*_*_'''dh-stm32mp25-dhcos-dhsbc'''_* configuration

== Useful instructions ==
==== Setup new board and install image files via USB (dfu and ums mode) / U-Boot recovery via DFU ====
*[[DHSBC STM32MP2 DFU and UMS usage|DHSBC STM32MP2 DFU and UMS usage]]

==== How to connect to WiFi network ====
:'''Establish connection'''
:{| class="wikitable"
|<tt>$ wpa_passphrase "SSID" > /etc/wpa_supplicant.conf</tt>
|}
:-> In the next step, please enter the password
:{| class="wikitable"
|<tt>$ rfkill unblock all</tt>
|-
|<tt>$ wpa_supplicant -B -i wlansom0 -c /etc/wpa_supplicant.conf</tt>
|}
:'''Disconnect'''
:{| class="wikitable"
|<tt>$ ip link set wlansom0 down</tt>
|}
==== Use GPIOs ====
:'''To list available GPIOs, use the gpioinfo command:'''
:{| class="wikitable"
|<tt>$ gpioinfo</tt>
|}
gpiochip0 - 16 lines:
line 0: "DHSBC_HW-CODE_0" input consumer="kernel"
line 1: "DHSBC_HW-CODE_1" input
line 2: "DHSBC_HW-CODE_2" input
line 3: "PA3" input
line 4: "DHCOS-E" input
line 5: "DHCOS-J" input
line 6: "PA6" input
line 7: "PA7" input
...

:'''To set a GPIO as Output-High:'''
:{| class="wikitable"
|<tt>$ gpioset "LABLE"=1</tt>
|}

:'''To set a GPIO as Output-Low:'''
:{| class="wikitable"
|<tt>$ gpioset "LABLE"=0</tt>
|}

:'''To get current state of a GPIO:'''
:{| class="wikitable"
|<tt>$ gpioget "LABLE"</tt>
|}

==== Configure systemd network configuration ====
:'''Find configuration files:'''
:{| class="wikitable"
|<tt>find /usr -name \*wlansom0\*</tt>
|-
|<tt>find /usr -name \*ethsom0\*</tt>
|-
|<tt>find /usr -name \*ethsom1\*</tt>
|}

:'''systemd network configuration:'''
* [https://wiki.archlinux.org/title/Systemd-networkd systemd-networkd documentation]
* [https://www.freedesktop.org/software/systemd/man/latest/systemd.network.html systemd.network — Network configuration]

== Links ==
* [https://www.dh-electronics.com/en/embedded-products/dhsom/detail/dhcos-stm32mp2x DH DHCOS STM32MP2x]
* [https://www.dh-electronics.com/en/embedded-products/development-carrier-boards/detail/dhsbc-stm32mp25 DH DHSBC STM32MP25]
* [https://wiki.st.com/stm32mpu/wiki/Main_Page STM32 MPU wiki]
* [https://wiki.st.com/stm32mpu/wiki/STM32MP23_resources STM32MP23 resources]
* [https://wiki.st.com/stm32mpu/wiki/STM32MP25_resources STM32MP25 resources]

DHSBC STM32MP13

2025-12-08T15:00:23Z

Ageisreiter: /* Software */

'''The DHSBC STM32MP13x board is the official DHCOR STM32MP13 reference design!'''

{|
|
|
|-
|__TOC__
|[[Image:DHCOR-STM32MP13_Top_highres.png|600px|COM Avenger96Board]]
|}

== Introduction ==
Reference design for secure industrial IoT devices based on STM32MP13x

* Single Board Computer based on the solderable DHCOR STM32MP13
* Compatible with accessories from the Raspberry Pi© community
* Highlights: Bluetooth / WiFi, Dual GB Ethernet, Secure Boot, OP-TEE support
* Trusted Platform Module 2.0 available on request
* Mainline Linux support and active software maintenance
* Industrial product design with CE certification
* Guaranteed long-term availability of 10+ years

== Technical Details ==
{| class="wikitable" align="center" | style="width: 100%; color: #000000; background: #f3f3f3;" valign="top" |
|-
| style="width: 50%; background: #076b8d; border: 0pt;" |
| style="width: 50%; background: #076b8d; border: 0pt;" |
|-
|valign="top" style="border: 0pt;" |
* '''STM32MP135F
**1x ARM® Cortex-A7 up to 1 GHz
'''
*'''PMIC''' STPMIC1D
*'''DDR3 DRAM''' 512 Mbyte @ 533 MHz
*'''eMMC Flash''' 4 Gbyte
*'''NOR Flash''' 4 Mbyte, Quad SPI interface
*'''EEPROM''' 4 kbyte
*'''RTC''' temp. compensated RV-3032-C7
*'''USB Host''' 1x type A, 2.0 high-speed
*'''USB Device''' 1x Type-C, 2.0 high-speed
*'''WiFi / Bluetooth'''
**WiFi 2.4GHz IEEE 802.11b / g / n
**Bluetooth® v5.2 (BR/EDR/BLE)
**Antenna: U-FL connector
*'''Ethernet''' 10 / 100 / 1000 Mbit/s, IEEE 802.3-compliant
|valign="top" style="border: 0pt;" |
*'''TPM''' (Trusted Platform Module)2.0 device ST33TPHF2XSPI
*'''Push-Buttons''' Power and reset
*'''Battery Socket''' CR1216, CR1220 and CR1225
*'''Boot Mode''' 3 bit boot mode switch
*'''Debug Interface''' JTAG interface via tag-connect
*'''Supply (SYS_DCIN)''' 8 - 18 VDC
*'''Temperature Range''' 0 - 40 °C
*'''Dimensions ''' 85 x 56 mm
*'''Raspberry Pi 40-pin Expansion'''
**2 x UART
**1 x I2C
**1 x I2S
**1 x SPI
**2 x PWM
**2 x CAN
**up to 28 x GPIOs
|}

== Product Change Notifications (PCN) ==
* [[media:PCN_DHCOR-STM32MP13-001_R01_2025-08-12.pdf|PCN_DHCOR-STM32MP13-001_R01_2025-08-12.pdf (4Gbyte eMMC Samsung)]]

== Downloads ==
* [[media:STM32-linux6_6_scarthgap_dh-stm32mp13-dhcor-dhsbc_meta-dhsom-extras_meta-dhsom-extras-qt6_meta-dhsom-extras-wpe.tar|DH Mainline based starter image 2024-07-03 (based on 6.6 Linux Kernel)]]

== Documentation ==
* [[media:DOC_DHSBC-STM32MP13-Quick-Start-Guide_R04_2025-04-08.pdf|'''NEW''' (for Hardware '''719-300 / HS00047''') Getting-Started with DHSBC STM32MP13 (R04)]]
* [[media:DOC_DHSBC-STM32MP13-Quick-Start-Guide_R03_2024-11-25.pdf|'''OLD''' (for Hardware '''719-100 / HS00035''') Getting-Started with DHSBC STM32MP13 (R03)]]
* [[media:USM DHCOR-STM32MP13 R01 2024-07-12.pdf|DHCOR STM32MP13 User Manual R01 '''IMPORTANT: Please have a look at chapter 26. Hardware design checklist''']]

== Design Files ==
* [[media:SCH_719-100-HS00035-customer_R06_2023-11-16.pdf|DHSBC STM32MP13 Schematic]]
* [[media:SCH_719-300-HS00047-customer-version_R01_2025-01-27.pdf|DHSBC STM32MP13 Schematic --> '''NEW EMI optimized version! Use this as development template!''']]
* [[media:DHSBC-STM32MP13-3D-STEP-719-100_R01_2024-03-07.zip|DHSBC STM32MP13 3D STEP file]]
* [[media:DHCOR-STM32MP13-Symbol-Footprint.zip|DHCOR STM32MP13 Allegro/layout symbol]]
* [[media:DHCOR-STM32MP13-3D-STEP-718-100_R01_2024-03-06.zip|DHCOR STM32MP13 3D STEP file]]

== Software ==
=== DH Mainline based Linux ===
* [https://github.com/dh-electronics/kas-dhsom Build your own Yocto Scarthgap LTS via kas (GitHub)]
* [https://github.com/dh-electronics/meta-dhsom-stm32-bsp Yocto BSP meta layer (Github)]
* [https://github.com/dh-electronics/prebuilt-test-images-dhsom Prebuilt test images for DH electronics DHSOM platforms]
: Note: Please use STM32-linux*_*_'''dh-stm32mp13-dhcor-dhsbc'''_* configuration

== Useful instructions ==
==== Setup new board and install image files via USB (dfu and ums mode) / U-Boot recovery via DFU ====
:[[DHSBC STM32MP13 DFU and UMS usage|DHSBC STM32MP13 DFU and UMS usage]]

==== eMMC boot / The bootloader is stored in the eMMC instead of the SPI boot flash ====
:[https://github.com/dh-electronics/meta-dhsom-stm32-bsp/blob/main/doc/stm32mp13-dhcor-dhsbc.md#operating-system-image-installation-into-emmc-from-linux Operating system image installation into eMMC (from Linux)]

==== How to connect to WiFi network with WPA2 PSK? ====
:'''Establish connection'''
:{| class="wikitable"
|<tt>$ wpa_passphrase "SSID" > /etc/wpa_supplicant.conf</tt>
|}
:-> In the next step, please enter the password
:{| class="wikitable"
|<tt>$ rfkill unblock all</tt>
|-
|<tt>$ ip link set wlansom0 up</tt>
|-
|<tt>$ wpa_supplicant -B -i wlansom0 -c /etc/wpa_supplicant.conf</tt>
|-
|<tt>$ udhcpc -i wlansom0 </tt>
|}
:'''Disconnect'''
:{| class="wikitable"
|<tt>$ ip link set wlansom0 down</tt>
|}

==== Simple Bluetooth test ====
:Bring up bluetooth on the STM32MP13xx DHCOR SoM / DHSBC:
:{| class="wikitable"
|<tt>$ hciconfig hci0 up</tt>
|}

:Make the STM32MP13xx DHCOR SoM / DHSBC discoverable to other BT devices:
:{| class="wikitable"
|<tt>$ hciconfig hci0 piscan</tt>
|}

:Scan for other discoverable devices:
:{| class="wikitable"
|<tt>$ hcitool scan</tt>
|} Scanning ...

:When the scan is now performed on a HostPC, the STM32MP13xx DHCOR SoM / DHSBC should be visible:
:{| class="wikitable"
|<tt>$ hciconfig hci0 up</tt>
|-
|<tt>$ hcitool scan</tt>
|}
:Scanning ...
DC:FE:23:12:34:56 dh-stm32mp13-dhcor-dhsbc

:To generate some traffic on the BT UART between SoC and BT chip, try e.g. L2 ping from hostpc:
:{| class="wikitable"
|<tt> l2ping DC:FE:23:12:34:56</tt>
|}
Ping: DC:FE:23:12:34:56 from E8:48:B8:11:22:33 (data size 44) ...
44 bytes from DC:FE:23:12:34:56 id 0 time 11.44ms
44 bytes from DC:FE:23:12:34:56 id 1 time 39.83ms
44 bytes from DC:FE:23:12:34:56 id 2 time 39.25ms ...

:An interesting option to l2ping is -f, flood ping, which sends a lot of packets, that means a lot more traffic too:
:{| class="wikitable"
|<tt> l2ping -f DC:FE:23:12:34:56</tt>
|}

==== Add support for joy-it RB-TFT3.2V2 SPI display====
:[[Image:DHSBC-STM32MP13-with-SPI-Display.png|300px]]
:Add Device Tree oeverlay to u-boot.
:{| class="wikitable"
|<tt>=> setenv loaddtos '#conf-stm32mp135f-dhcor-dhsbc.dtb#conf-stm32mp13xx-dhcor-dhsbc-overlay-rb-tft32-v2.dtbo'</tt>
|-
|<tt>=> saveenv </tt>
|-
|<tt>=> saveenv </tt>
|}
* [https://joy-it.net/en/products/RB-TFT3.2V2 Link: joy-it RB-TFT3.2V2]

==== Year 2038 problem with 32-bit systems ====
:'''How can the problem be solved?'''
:- Linux kernel - disable COMPAT_32BIT_TIME and fix whatever broken userspace you might still have. This disables backward compatibility syscalls which use 32bit time_t and which will surely break in 2038.
:- Userspace/OE - Keep an eye on OE QA failures flagged with "32bit-time" which indicate use of 32 bit time_t . Fix your recipes and upstream the changes.
:- Filesystems - Avoid ext2 and ext3, they are always affected by Y2038. Avoid ext4 with small inode size, less than 256 Bytes inodes are affected. Use ext4 with inodes larger than 256 Bytes.
:- Testing - See OE-core meta/conf/distro/include/time64.inc as a good starting point for simulating Y2038 in QEMU. Test real HW as well, set time past 2038 and especially test updates, see if TLS certificates survive or there is a roll-over of some sort, which would break update-ability in field after 2038. Note that wrong system time, set in far past, can also make the SSL library reject certificates.

== Links ==
* [https://www.dh-electronics.com/embedded-produkte/dhsom/detail/dhcor-stm32mp13 DH DHCOR STM32MP13]
* [https://www.dh-electronics.com/embedded-produkte/development-carrier-boards/detail/dhsbc-stm32mp13 DH DHSBC STM32MP13]
* [https://wiki.st.com/stm32mpu/wiki/Main_Page STM32 MPU wiki]
* [https://wiki.st.com/stm32mpu/wiki/Category:Device_tree_configuration STM32 MPU wiki - Device tree configuration]
* [https://wiki.st.com/stm32mpu/wiki/STM32MP13_resources STM32MP13 resources]

DHSBC STM32MP2x

2025-12-08T14:58:14Z

Ageisreiter: /* Software */

'''The DHSBC STM32MP25 board is the official DHCOS STM32MP25x reference design!'''

{|
|
|
|-
|__TOC__
|[[Image:DHSBC_STM32MP2-Top-medres.jpg|600px|DHSBC STM32MP2]]
|}

== Introduction ==
Reference design for secure industrial IoT devices based on STM32MP25

* Single Board Computer based on solderable, pin-compatible DHCOS STM32MP25 SOM
* Industrial grade, 10+ years available
* Mainline Linux support (also for Vivante GPU)
* Security Features e.g. Secure Boot / Storage
* Connectivity: Gbit Ethernet, WiFi/BT
* Multimedia: 3D GPU, display, video, camera
* STPMIC25 supports low power modes

== Technical Details ==
{| class="wikitable" align="center" | style="width: 100%; color: #000000; background: #f3f3f3;" valign="top" |
|-
| style="width: 50%; background: #076b8d; border: 0pt;" |
| style="width: 50%; background: #076b8d; border: 0pt;" |
|-
|valign="top" style="border: 0pt;" |
* '''STM32MP255C
**2x ARM Cortex-A35 with 1.2 GHz
**1x ARM Cortex-M33 up to 400 MHz
'''
*'''PMIC''' STPMIC25D
*'''LPDDR4 32-bit''' 4 Gbyte @ 1200 MHz
*'''eMMC Flash''' 16 Gbyte
*'''NOR Flash''' 4 Mbyte, Quad SPI interface
*'''EEPROM''' 4 kbyte
*'''microSD socket'''
*'''RTC''' temp. compensated RV-3032-C7
*'''USB Host''' 1x type A, 2.0 high-speed
*'''USB Type-C''' 1x USB-C 3.2 Gen 1x1 with DisplayPort alt. mode support
*'''WiFi / Bluetooth'''
**Tri band 2.4 GHz, 5 GHz and 6 GHz for IEEE802.11a/b/g/n/ac/ax
**Bluetooth® v5.4 BR/EDR/LE
**Antenna: U-FL connector
*'''Ethernet''' 2x 10 / 100 / 1000 Mbit/s, IEEE 802.3-compliant
|valign="top" style="border: 0pt;" |
*'''LVDS''' 1x Dual Link, 2x 4-lane LVDS connector
*'''MIPI-CSI2''' 1x 2-lanes connector
*'''TPM''' (Trusted Platform Module)2.0 device ST33KTPM2I
*'''Push-Buttons''' Power and reset
*'''Battery Socket''' CR1216, CR1220 and CR1225
*'''Boot Mode''' 4 bit boot mode switch
*'''Debug Interface''' JTAG interface via tag-connect
*'''Supply''' 5 VDC, USB Type-C power supply port
*'''Dimensions ''' 85 x 56 mm
*'''Raspberry Pi 40-pin Expansion'''
**2 x UART
**1 x I2C
**1 x I2S
**1 x SPI
**2 x PWM
**2 x CAN
**up to 28 x GPIOs
|}

== Product Change Notifications (PCN) ==

== IMPORTANT INFORMATIONS ==
* '''The DHSBC DisplayPort functionality has not yet been implemented at this time. The test image is a headless image. If you want to connect a display, please contact DH electronics. We can offer a 10" LVDS test kit, or you can connect your own LVDS display and we will assist with implementation.'''

== Documentation ==
* [[media:DOC_DHSBC-STM32MP25-Quick-Start-Guide_R01_2025-09-11.pdf|Getting-Started with DHSBC STM32MP25]]
* [[media:USM_DHCOS-STM32MP2x-preliminary_2025-05-27.pdf|DHCOS STM32MP2x User Manual '''IMPORTANT: Please have a look at chapter 27. Hardware design checklist''']]

== Design Files ==
* [[media:SCH_739-100-HS00048-customer-preliminary_R03_2025-03-27.pdf|DHSBC STM32MP25 Schematic]]
* [[media:DHCOS-STM32MP2-3D-STEP-736-100_R01_2025-03-25.zip|DHCOS STM32MP2x 3D STEP file]]
* [[media:DHSBC-STM32MP2-3D-STEP-739-100-R01 2025-09-12.zip|DHSBC STM32MP2 3D STEP file]]

== Software ==
* [https://github.com/dh-electronics/kas-dhsom Build your own Yocto LTS via kas (GitHub)]
: Note: Please use dh-stm32mp25-dhcos-dhsbc.yml configuration.
* [https://github.com/dh-electronics/meta-dhsom-stm32-wip-bsp Yocto BSP meta layer (Github)]
: Note: Currently, for the DHCOS STM32MP2, we use the 'meta-dhsom-stm32-wip-bsp' (work in progress) layer. The STM32MP2 will later be integrated into the meta-dhsom-stm32-bsp layer.
* [https://github.com/dh-electronics/prebuilt-test-images-dhsom Prebuilt test images for DH electronics DHSOM platforms]
: Note: Please use STM32-linux*_*_'''dh-stm32mp25-dhcos-dhsbc'''_* configuration

== Useful instructions ==
==== Setup new board and install image files via USB (dfu and ums mode) / U-Boot recovery via DFU ====
*[[DHSBC STM32MP2 DFU and UMS usage|DHSBC STM32MP2 DFU and UMS usage]]

==== How to connect to WiFi network ====
:'''Establish connection'''
:{| class="wikitable"
|<tt>$ wpa_passphrase "SSID" > /etc/wpa_supplicant.conf</tt>
|}
:-> In the next step, please enter the password
:{| class="wikitable"
|<tt>$ rfkill unblock all</tt>
|-
|<tt>$ wpa_supplicant -B -i wlansom0 -c /etc/wpa_supplicant.conf</tt>
|}
:'''Disconnect'''
:{| class="wikitable"
|<tt>$ ip link set wlansom0 down</tt>
|}
==== Use GPIOs ====
:'''To list available GPIOs, use the gpioinfo command:'''
:{| class="wikitable"
|<tt>$ gpioinfo</tt>
|}
gpiochip0 - 16 lines:
line 0: "DHSBC_HW-CODE_0" input consumer="kernel"
line 1: "DHSBC_HW-CODE_1" input
line 2: "DHSBC_HW-CODE_2" input
line 3: "PA3" input
line 4: "DHCOS-E" input
line 5: "DHCOS-J" input
line 6: "PA6" input
line 7: "PA7" input
...

:'''To set a GPIO as Output-High:'''
:{| class="wikitable"
|<tt>$ gpioset "LABLE"=1</tt>
|}

:'''To set a GPIO as Output-Low:'''
:{| class="wikitable"
|<tt>$ gpioset "LABLE"=0</tt>
|}

:'''To get current state of a GPIO:'''
:{| class="wikitable"
|<tt>$ gpioget "LABLE"</tt>
|}

==== Configure systemd network configuration ====
:'''Find configuration files:'''
:{| class="wikitable"
|<tt>find /usr -name \*wlansom0\*</tt>
|-
|<tt>find /usr -name \*ethsom0\*</tt>
|-
|<tt>find /usr -name \*ethsom1\*</tt>
|}

:'''systemd network configuration:'''
* [https://wiki.archlinux.org/title/Systemd-networkd systemd-networkd documentation]
* [https://www.freedesktop.org/software/systemd/man/latest/systemd.network.html systemd.network — Network configuration]

== Links ==
* [https://www.dh-electronics.com/en/embedded-products/dhsom/detail/dhcos-stm32mp2x DH DHCOS STM32MP2x]
* [https://www.dh-electronics.com/en/embedded-products/development-carrier-boards/detail/dhsbc-stm32mp25 DH DHSBC STM32MP25]
* [https://wiki.st.com/stm32mpu/wiki/Main_Page STM32 MPU wiki]
* [https://wiki.st.com/stm32mpu/wiki/STM32MP23_resources STM32MP23 resources]
* [https://wiki.st.com/stm32mpu/wiki/STM32MP25_resources STM32MP25 resources]

DHCOM iMX6-D2

2025-12-01T10:58:29Z

Ageisreiter: /* Product Change Notifications (PCN) */

{|
|
|
|-
|__TOC__
|[[Image:IM6Modul.png|600px|COM iMX6-D2]]
|}

== Hardware ==

{| class="wikitable" align="center" | style="width: 100%; color: #000000; background: #f3f3f3;" valign="top" |
|-
| style="width: 50%; background: #076b8d; border: 0pt;" |
| style="width: 50%; background: #076b8d; border: 0pt;" |
|-
|valign="top" style="border: 0pt;" |
* '''Cortex-A9 Freescale i.MX6 Solo/DualLite/Dual/Quad up to 1.2GHz'''
* 2D (GC320) / 3D (GC880/GC2000) graphics accelerator
* 128 - 1024 MByte NAND flash memory (8 bit bus width) or 4 - 16 GByte eMMC flash (8 bit bus width)
* 2 MB SPI boot flash
* 256 - 2048 MByte DDR3-1066 or DDR3-800
* On module microSD card socket (4 bit SDIO) [1]
* SD/MMC card interface, 4 bit SDIO
* LC display controller, 24 bit colors, 2048x1536 pixels
* LVDS 4-channel, max. 165 Mpixels/s
* On-board touch controller for 4-wire resistive touch screens
* Ethernet controller 10/100 Mbit, IEEE1588 conform
* USB 2.0 OTG high-speed
* USB 2.0 host high speed
* Full function UART [2]
* Standard UART with hardware handshake support
* Standard UART
 [1] On module microSD card socket is only available if second CAN port is not connected.
 [2] CTS and RTS is only available if second CAN port is not connected.
|valign="top" style="border: 0pt;" |
* 2x CAN interface [1][2]
* 2x SPI interface
* 2x I²C interface
* I²S Audio codec (1 x microphone, 1 x Line in, 1x Line out)
* Real-time clock (I²C connection), low power temperature compensated
* 12 bit analog input
* 128 Bytes EEPROM with integrated MAC address
* 16 bit address/databus interface on SODIMM-200 socket
* PWM channel
* 24 GPIOs (A-W + INT_HI_PRIO)
* JTAG debug connection via FFC plug connector
* Industrial temperature range (-40°C to +85°C)
* SODIMM-200 socket with DHCOM pin assignment
|}

*[[COM iMX6 Hardware|Hardware Support]]

== Product Change Notifications (PCN) ==
* [[media:PCN_iMX6_R01_2017-08-17.pdf|PCN_iMX6_R01_2017-08-17.pdf (4GByte eMMC)]]
* [[media:PCN_iMX6_R02_2017-08-17.pdf|PCN_iMX6_R02_2017-08-17.pdf (8GByte eMMC)]]
* [[media:PCN_iMX6_R03_2017-09-20.pdf|PCN_iMX6_R03_2017-09-20.pdf (SW ethernet bug)]]
* [[media:PCN_iMX6_R04_2017-09-25.pdf|PCN_iMX6_R04_2017-09-25.pdf (Molex microSD socket)]]
* [[media:PCN_iMX6_R05_2018-01-10.pdf|PCN_iMX6_R05_2018-01-10.pdf (512MB NAND flash)]]
* [[media:PCN_iMX6_R06_2018-10-09.pdf|PCN_iMX6_R06_2018-10-09.pdf (label change)]]
* [[media:PCN_iMX6_R07_2019-11-13.pdf|PCN_iMX6_R07_2019-11-13.pdf (4GByte eMMC)]]
* [[media:PCN_iMX6_R08_2019-11-13.pdf|PCN_iMX6_R08_2019-11-13.pdf (8GByte eMMC)]]
* [[media:PCN_iMX6-009_R01_2021-07-20.pdf|PCN_iMX6-009_R01_2021-07-20.pdf (SPI flash EOL)]]
* [[media:PCN_DHCOM-iMX6-010_R01_2021-12-23.pdf|PCN_DHCOM-iMX6-010_R01_2021-12-23.pdf (microSD socket EOL)]]
* [[media:PCN_DHCOM-iMX6-011_R01_2022-07-18.pdf|PCN_DHCOM-iMX6-011_R01_2022-07-18.pdf (adress latch)]]
* [[media:PCN_DHCOM-iMX6-012_R01_2025-07-28.pdf|PCN_DHCOM-iMX6-012_R01_2025-07-28.pdf (reset monitor)]]
* [[media:PCN_DHCOM-iMX6-013_R02_2025-11-17.pdf|PCN_DHCOM-iMX6-013_R02_2025-11-17.pdf (4Gbyte eMMC Samsung)]]
* [[media:PCN_DHCOM-iMX6-014_R02_2025-12-01.pdf|PCN_DHCOM-iMX6-014_R02_2025-12-01.pdf (8Gbyte eMMC Samsung)]]

== Software Support ==
*[[COM iMX6 Bootloader U-Boot|i.MX6: Bootloader U-Boot]]
*[[COM iMX6 Linux|i.MX6: Linux]]
*[[DHCOM Update Mechanism|DHCOM Update Mechanism]]
* [https://github.com/dh-electronics/meta-dhsom-imx-bsp Yocto BSP meta layer --> Github]
* [https://github.com/dh-electronics/kas-dhsom Easy Yocto build via KAS --> Github]
*[[COM iMX6 WinCE|i.MX6: WinCE]]

== BSP Sources==
==== [https://www.denx.de/wiki/U-Boot U-Boot] ====
* [https://github.com/dh-electronics/u-boot-imx6qdl/tree/dev/legacy/2018.05_dhcom DH U-Boot (based on v2018.05)]
* [https://github.com/dh-electronics/u-boot-imx6qdl/tree/dev/2015.10_dhcom DH U-Boot (based on v2015.10)(deprecated)]
* [https://github.com/dh-electronics/u-boot-imx6qdl/tree/dev/2013.10_dhcom DH U-Boot (based on v2013.10)(deprecated)]

==== [https://www.kernel.org Linux Kernel] ====
* Mainline
:* [https://github.com/dh-electronics/linux-imx6qdl/tree/release/5.10.131_dhsom/20220725 DH 5.10.131 Release 2022-07-25]
* NXP Vendor
:* [https://github.com/dh-electronics/linux-imx6-vendor/tree/release/v4.1.15/20190926 DH 4.1.15 Release 2019-09-26]
:* [https://github.com/dh-electronics/linux-imx6-vendor/tree/release/v3.10.17/20170804 DH 3.10.17 Release 2017-08-04]

== Download binaries/images ==
==== U-Boot (for eMMC DHCOMs) ====
* [[media:U-boot-with-spl_imx6_v2.4.0.0_emmc.imx|DH U-Boot v2.4.0.0 (based on v2018.05)]]
* [[media:V1-1-0-8_u-boot-imx6qdl.tar.xz|DH U-Boot v1.1.0.8 (based on v2015.10)]]
: More on how to program it with the U-Boot command "update bootloader ..." on the page [[DHCOM Update Mechanism#Commandline Mode|"DHCOM Update Mechanism"]]

==== Update Kernel ====
* Please contact DH electronics if you need a binary.
: More on how to use it on the page [[DHCOM Update Mechanism|"DHCOM Update Mechanism"]]

==== Debian based images ====
* Debian 10 "Buster" + Kernel 5.10.131 Release 2022-08-19
: Note: Devicetree is set to "imx6q-dhcom-pdk2.dtb" in uLinuxEnv.txt

:* [[media:HD00035_2022-08-19_imx6_buster_sdcard_2000MB.img.xz|SD card: 2GB image (xz compressed)]]
:: Open it with Disks by double click on Debian Linux. Use [https://www.balena.io/etcher balenaEtcher] on Windows.

:* [[media:HD00035_2022-08-19_imx6_buster_USB_stick_update.zip|eMMC: USB stick update image]]
:: Extract the files on a USB stick (MBR / FAT32) and insert it into your board / device. More about the files on the page [[DHCOM Update Mechanism|"DHCOM Update Mechanism"]]

* Debian 8 "Jessie" with Qt5.9.1 + Vendor Kernel 4.1.15 Release 2019-09-26

:* [[media:HD00039_2019-09-26_imx6_jessie_qt5.9.1_sdcard_2000MB.img.xz|SD card: 2GB image (xz compressed)]]
:: Open it with Disks by double click on Debian Linux. Use [https://www.balena.io/etcher balenaEtcher] on Windows.

:* [[media:HD00039_2019-09-26_imx6_jessie_qt5.9.1_USB_stick_update.zip|eMMC: USB stick update image]]
:: Extract the files on a USB stick (MBR / FAT32) and insert it into your board / device. More about the files on the page [[DHCOM Update Mechanism|"DHCOM Update Mechanism"]]

Hint: You can also progam the eMMC by using the [[COM iMX6 Bootloader U-Boot#USB Mass Storage|U-Boot command "ums"]] (usable since U-Boot v2018.05)

== Download Linux code examples ==
==== [[Virtual Machine for Application Development#Code Examples for Userspace-Applications to Access SPI, I2C, GPIOs, and more|Code Examples for Userspace-Applications to Access SPI, I2C, GPIOs, and more]] ====

== Download WEC ==
==== WEC7 DHHalLib.dll (function library) ====
* [[media:DHHalLib_WEC7_R11_2022-05-11.zip|Download DHHalLib Library Version 1.3.0.7]]
* [[media:DHHalLib_Test_App_Source_WEC7_R10_2022-04-06.zip|DHHalLib Demo App Source Code ]]
* [[media:DHHalLib_Test_App_Binary_WEC7_R10_2022-04-06.zip|DHHalLib Demo App Binary File]]
* [[media:CSharp_LibWrapper_Source_WEC7_R09_2022-03-18.zip|Download DHHalLib CSharp Wrapper]]
* [[media:CSharp_LibWrapper.zip|Download DHHalLib CSharp Demo Wrapper App ]]
* [[media:CSharp_LibWrapper_Binary.zip|Download DHHalLib CSharp Demo Wrapper App Binary File]]

==== WEC7 binary BSP ====
* [[media:2016-05-19_DHCOM_iMX6_BSP_BIN.zip|Download WEC7 binary BSP (date: 2016-05-19)]]

==== WEC2013 DHHalLib.dll (function library) ====
* [[media:DHHalLib_WEC2013_R12_2021-10-01.zip|Download DHHalLib Library Version 1.4.2.2]]
* [[media:DHHalLib_Test_App_Source_WEC2013_R07_2018_06_12.zip|DHHalLib Demo App Source Code ]]
* [[media:DHHalLib_Test_App_Binary_WEC2013_R09_2021-10-01.zip|DHHalLib Demo App Binary File]]
* [[media:CSharp_LibWrapper_Source_WEC2013_R07_2021-10-01.zip|Download DHHalLib CSharp Wrapper]]
* [[media:CSharp_DHHalLib_Wrapper_App_Source_WEC2013_R05_2017_08_08.zip|DHHalLib C# Demo App Source Code]]
* [[media:CSharp_DHHalLib_Wrapper_App_Binary_WEC2013_R05_2017_08_08.zip|DHHalLib C# Demo App Binary File]]

File:PCN DHCOM-iMX6-014 R02 2025-12-01.pdf

2025-12-01T10:58:00Z

Ageisreiter:

File:PCN DHCOM-i.MX8MP-001 R01 2025-10-31.pdf

2025-11-28T12:25:07Z

Ageisreiter: Ageisreiter uploaded a new version of File:PCN DHCOM-i.MX8MP-001 R01 2025-10-31.pdf

File:PCN DHCOM-i.MX8MP-002 R01 2025-11-04.pdf

2025-11-28T12:24:42Z

Ageisreiter: Ageisreiter uploaded a new version of File:PCN DHCOM-i.MX8MP-002 R01 2025-11-04.pdf

File:PCN DHCOM-i.MX8MP-003 R01 2025-10-31.pdf

2025-11-28T12:24:14Z

Ageisreiter: Ageisreiter uploaded a new version of File:PCN DHCOM-i.MX8MP-003 R01 2025-10-31.pdf

DHSBC STM32MP13

2025-11-26T11:35:38Z

Ageisreiter: /* Useful instructions */

'''The DHSBC STM32MP13x board is the official DHCOR STM32MP13 reference design!'''

{|
|
|
|-
|__TOC__
|[[Image:DHCOR-STM32MP13_Top_highres.png|600px|COM Avenger96Board]]
|}

== Introduction ==
Reference design for secure industrial IoT devices based on STM32MP13x

* Single Board Computer based on the solderable DHCOR STM32MP13
* Compatible with accessories from the Raspberry Pi© community
* Highlights: Bluetooth / WiFi, Dual GB Ethernet, Secure Boot, OP-TEE support
* Trusted Platform Module 2.0 available on request
* Mainline Linux support and active software maintenance
* Industrial product design with CE certification
* Guaranteed long-term availability of 10+ years

== Technical Details ==
{| class="wikitable" align="center" | style="width: 100%; color: #000000; background: #f3f3f3;" valign="top" |
|-
| style="width: 50%; background: #076b8d; border: 0pt;" |
| style="width: 50%; background: #076b8d; border: 0pt;" |
|-
|valign="top" style="border: 0pt;" |
* '''STM32MP135F
**1x ARM® Cortex-A7 up to 1 GHz
'''
*'''PMIC''' STPMIC1D
*'''DDR3 DRAM''' 512 Mbyte @ 533 MHz
*'''eMMC Flash''' 4 Gbyte
*'''NOR Flash''' 4 Mbyte, Quad SPI interface
*'''EEPROM''' 4 kbyte
*'''RTC''' temp. compensated RV-3032-C7
*'''USB Host''' 1x type A, 2.0 high-speed
*'''USB Device''' 1x Type-C, 2.0 high-speed
*'''WiFi / Bluetooth'''
**WiFi 2.4GHz IEEE 802.11b / g / n
**Bluetooth® v5.2 (BR/EDR/BLE)
**Antenna: U-FL connector
*'''Ethernet''' 10 / 100 / 1000 Mbit/s, IEEE 802.3-compliant
|valign="top" style="border: 0pt;" |
*'''TPM''' (Trusted Platform Module)2.0 device ST33TPHF2XSPI
*'''Push-Buttons''' Power and reset
*'''Battery Socket''' CR1216, CR1220 and CR1225
*'''Boot Mode''' 3 bit boot mode switch
*'''Debug Interface''' JTAG interface via tag-connect
*'''Supply (SYS_DCIN)''' 8 - 18 VDC
*'''Temperature Range''' 0 - 40 °C
*'''Dimensions ''' 85 x 56 mm
*'''Raspberry Pi 40-pin Expansion'''
**2 x UART
**1 x I2C
**1 x I2S
**1 x SPI
**2 x PWM
**2 x CAN
**up to 28 x GPIOs
|}

== Product Change Notifications (PCN) ==
* [[media:PCN_DHCOR-STM32MP13-001_R01_2025-08-12.pdf|PCN_DHCOR-STM32MP13-001_R01_2025-08-12.pdf (4Gbyte eMMC Samsung)]]

== Downloads ==
* [[media:STM32-linux6_6_scarthgap_dh-stm32mp13-dhcor-dhsbc_meta-dhsom-extras_meta-dhsom-extras-qt6_meta-dhsom-extras-wpe.tar|DH Mainline based starter image 2024-07-03 (based on 6.6 Linux Kernel)]]

== Documentation ==
* [[media:DOC_DHSBC-STM32MP13-Quick-Start-Guide_R04_2025-04-08.pdf|'''NEW''' (for Hardware '''719-300 / HS00047''') Getting-Started with DHSBC STM32MP13 (R04)]]
* [[media:DOC_DHSBC-STM32MP13-Quick-Start-Guide_R03_2024-11-25.pdf|'''OLD''' (for Hardware '''719-100 / HS00035''') Getting-Started with DHSBC STM32MP13 (R03)]]
* [[media:USM DHCOR-STM32MP13 R01 2024-07-12.pdf|DHCOR STM32MP13 User Manual R01 '''IMPORTANT: Please have a look at chapter 26. Hardware design checklist''']]

== Design Files ==
* [[media:SCH_719-100-HS00035-customer_R06_2023-11-16.pdf|DHSBC STM32MP13 Schematic]]
* [[media:SCH_719-300-HS00047-customer-version_R01_2025-01-27.pdf|DHSBC STM32MP13 Schematic --> '''NEW EMI optimized version! Use this as development template!''']]
* [[media:DHSBC-STM32MP13-3D-STEP-719-100_R01_2024-03-07.zip|DHSBC STM32MP13 3D STEP file]]
* [[media:DHCOR-STM32MP13-Symbol-Footprint.zip|DHCOR STM32MP13 Allegro/layout symbol]]
* [[media:DHCOR-STM32MP13-3D-STEP-718-100_R01_2024-03-06.zip|DHCOR STM32MP13 3D STEP file]]

== Software ==
=== DH Mainline based Linux ===
* [https://github.com/dh-electronics/kas-dhsom Build your own Yocto Scarthgap LTS via kas (GitHub)]
* [https://github.com/dh-electronics/meta-dhsom-stm32-bsp Yocto BSP meta layer (Github)]

== Useful instructions ==
==== Setup new board and install image files via USB (dfu and ums mode) / U-Boot recovery via DFU ====
:[[DHSBC STM32MP13 DFU and UMS usage|DHSBC STM32MP13 DFU and UMS usage]]

==== eMMC boot / The bootloader is stored in the eMMC instead of the SPI boot flash ====
:[https://github.com/dh-electronics/meta-dhsom-stm32-bsp/blob/main/doc/stm32mp13-dhcor-dhsbc.md#operating-system-image-installation-into-emmc-from-linux Operating system image installation into eMMC (from Linux)]

==== How to connect to WiFi network with WPA2 PSK? ====
:'''Establish connection'''
:{| class="wikitable"
|<tt>$ wpa_passphrase "SSID" > /etc/wpa_supplicant.conf</tt>
|}
:-> In the next step, please enter the password
:{| class="wikitable"
|<tt>$ rfkill unblock all</tt>
|-
|<tt>$ ip link set wlansom0 up</tt>
|-
|<tt>$ wpa_supplicant -B -i wlansom0 -c /etc/wpa_supplicant.conf</tt>
|-
|<tt>$ udhcpc -i wlansom0 </tt>
|}
:'''Disconnect'''
:{| class="wikitable"
|<tt>$ ip link set wlansom0 down</tt>
|}

==== Simple Bluetooth test ====
:Bring up bluetooth on the STM32MP13xx DHCOR SoM / DHSBC:
:{| class="wikitable"
|<tt>$ hciconfig hci0 up</tt>
|}

:Make the STM32MP13xx DHCOR SoM / DHSBC discoverable to other BT devices:
:{| class="wikitable"
|<tt>$ hciconfig hci0 piscan</tt>
|}

:Scan for other discoverable devices:
:{| class="wikitable"
|<tt>$ hcitool scan</tt>
|} Scanning ...

:When the scan is now performed on a HostPC, the STM32MP13xx DHCOR SoM / DHSBC should be visible:
:{| class="wikitable"
|<tt>$ hciconfig hci0 up</tt>
|-
|<tt>$ hcitool scan</tt>
|}
:Scanning ...
DC:FE:23:12:34:56 dh-stm32mp13-dhcor-dhsbc

:To generate some traffic on the BT UART between SoC and BT chip, try e.g. L2 ping from hostpc:
:{| class="wikitable"
|<tt> l2ping DC:FE:23:12:34:56</tt>
|}
Ping: DC:FE:23:12:34:56 from E8:48:B8:11:22:33 (data size 44) ...
44 bytes from DC:FE:23:12:34:56 id 0 time 11.44ms
44 bytes from DC:FE:23:12:34:56 id 1 time 39.83ms
44 bytes from DC:FE:23:12:34:56 id 2 time 39.25ms ...

:An interesting option to l2ping is -f, flood ping, which sends a lot of packets, that means a lot more traffic too:
:{| class="wikitable"
|<tt> l2ping -f DC:FE:23:12:34:56</tt>
|}

==== Add support for joy-it RB-TFT3.2V2 SPI display====
:[[Image:DHSBC-STM32MP13-with-SPI-Display.png|300px]]
:Add Device Tree oeverlay to u-boot.
:{| class="wikitable"
|<tt>=> setenv loaddtos '#conf-stm32mp135f-dhcor-dhsbc.dtb#conf-stm32mp13xx-dhcor-dhsbc-overlay-rb-tft32-v2.dtbo'</tt>
|-
|<tt>=> saveenv </tt>
|-
|<tt>=> saveenv </tt>
|}
* [https://joy-it.net/en/products/RB-TFT3.2V2 Link: joy-it RB-TFT3.2V2]

==== Year 2038 problem with 32-bit systems ====
:'''How can the problem be solved?'''
:- Linux kernel - disable COMPAT_32BIT_TIME and fix whatever broken userspace you might still have. This disables backward compatibility syscalls which use 32bit time_t and which will surely break in 2038.
:- Userspace/OE - Keep an eye on OE QA failures flagged with "32bit-time" which indicate use of 32 bit time_t . Fix your recipes and upstream the changes.
:- Filesystems - Avoid ext2 and ext3, they are always affected by Y2038. Avoid ext4 with small inode size, less than 256 Bytes inodes are affected. Use ext4 with inodes larger than 256 Bytes.
:- Testing - See OE-core meta/conf/distro/include/time64.inc as a good starting point for simulating Y2038 in QEMU. Test real HW as well, set time past 2038 and especially test updates, see if TLS certificates survive or there is a roll-over of some sort, which would break update-ability in field after 2038. Note that wrong system time, set in far past, can also make the SSL library reject certificates.

== Links ==
* [https://www.dh-electronics.com/embedded-produkte/dhsom/detail/dhcor-stm32mp13 DH DHCOR STM32MP13]
* [https://www.dh-electronics.com/embedded-produkte/development-carrier-boards/detail/dhsbc-stm32mp13 DH DHSBC STM32MP13]
* [https://wiki.st.com/stm32mpu/wiki/Main_Page STM32 MPU wiki]
* [https://wiki.st.com/stm32mpu/wiki/Category:Device_tree_configuration STM32 MPU wiki - Device tree configuration]
* [https://wiki.st.com/stm32mpu/wiki/STM32MP13_resources STM32MP13 resources]

DHCOM iMX6ULL-D2

2025-11-19T14:54:25Z

Ageisreiter: /* DHCOR i.MX6ULL */

{|
|
|
|-
|rowspan="2"|__TOC__
|style="padding-left:100px"|[[Image:IMX6ULL_DHCOR_Modul.png|320px|DHCOR i.MX6ULL-LG]]
|-
|[[Image:IMX6ULLModul.png|600px|DHCOM iMX6ULL-D2]]
|}

== Scope ==
'''This is also the right page for the DHCOR module, because DHCOM is the reference design for the DHCOR module.'''

== Hardware ==
{| class="wikitable" align="center" | style="width: 100%; color: #000000; background: #f3f3f3;" valign="top" |
|-
| style="width: 50%; background: #076b8d; border: 0pt;" |
| style="width: 50%; background: #076b8d; border: 0pt;" |
|-
|valign="top" style="border: 0pt;" |
* '''Cortex-A7 NXP i.MX6ULL up to 900 MHz'''
* 128 - 1024 MByte NAND flash memory (8 bit bus width) or 4 - 16 GByte eMMC flash (8 bit bus width)
* 2 MB SPI boot flash
* 128 - 1024 MByte DDR3-400
* On module microSD card socket (4 bit SDIO) [1]
* LC display controller, 18 bit colors, 1366x768 pixels
* On-chip touch controller for 4-wire resistive touch screens
* 2x Ethernet controller 10/100 Mbit, IEEE1588 conform [2]
* USB 2.0 OTG high-speed
* USB 2.0 host high speed
* 2x Standard UART with hardware handshake support [3][4]
* WiFi iEEE802.11b/g/n + Bluetooth v4.1 (BR/EDR/BLE) module on BGA [1][4]
 [1] On module microSD card socket is only available if WiFi is not mounted.
 [2] The second SPI is only available, if the second ethernet is not mounted.
 [3] CTS and RTS of the first UART is only available if second CAN port is not connected.
 [4] The second UART is only available if Bluetooth is not used. This means WiFi/BT module 1DX is not mounted or module 1FX (only WiFi) is mounted.
 [5] I²S lines are shared with JTAG.
|valign="top" style="border: 0pt;" |
* 2x CAN interface [3]
* 2x SPI interface [2]
* 2x I²C interface
* I²S Audio codec (1 x microphone, 1 x Line in, 1x Line out) [5]
* Real-time clock (I²C connection), low power temperature compensated
* 2x 10 bit analog input (I²C connection)
* 2x 256 Bytes EEPROM with integrated MAC address
* PWM channel
* 22 GPIOs (A-U + INT_HI_PRIO)
* JTAG debug connection via FFC plug connector
* Industrial temperature range (-40°C to +85°C)
* SODIMM-200 socket with DHCOM pin assignment
|}

*[[COM iMX6ULL Hardware|Hardware Support]]

== Product Change Notifications (PCN) ==
==== DHCOR i.MX6ULL ====
* [[media:PCN_DHCOR-iMX6ULL-001_R01_2020-02-18.pdf|PCN_DHCOR-iMX6ULL-001_R01_2020-02-18.pdf (IMX_THERMAL)]]
* [[media:PCN_DHCOR-iMX6ULL-002_R01_2020-02-18.pdf|PCN_DHCOR-iMX6ULL-002_R01_2020-02-18.pdf (SPEED_GRADING)]]
* [[media:PCN_DHCOR-iMX6ULL-003_R01_2020-02-18.pdf|PCN_DHCOR-iMX6ULL-003_R01_2020-02-18.pdf (Bootloader on eMMC)]]
* [[media:PCN_DHCOR-iMX6ULL-004_R01_2020-09-17.pdf|PCN_DHCOR-iMX6ULL-004_R01_2020-09-17.pdf (900MHz undervolt)]]
* [[media:PCN_DHCOR-iMX6ULL-005_R01_2021-05-05.pdf|PCN_DHCOR-iMX6ULL-005_R01_2021-05-05.pdf (VDD_SOC_CAP capacitor)]]
* [[media:PCN_DHCOR-iMX6ULL-006_R02_2021-05-10.pdf|PCN_DHCOR-iMX6ULL-006_R02_2021-05-10.pdf (PMIC buck converter mode)]]
* [[media:PCN_DHCOR-iMX6ULL-007_R01_2021-07-28.pdf|PCN_DHCOR-iMX6ULL-007_R01_2021-07-28.pdf (Change of PCB)]]
* [[media:PCN_DHCOR-iMX6ULL-008_R01_2025-11-19.pdf|PCN_DHCOR-iMX6ULL-008_R01_2025-11-19.pdf (muRata 1DX EOL)]]

==== DHCOM i.MX6ULL ====
* [[media:PCN_DHCOM-iMX6ULL-001_R01_2021-12-23.pdf|PCN_DHCOM-iMX6ULL-001_R01_2021-12-23.pdf (microSD socket EOL)]]
* [[media:PCN_DHCOM-iMX6ULL-002_R01_2025-08-12.pdf|PCN_DHCOM-iMX6ULL-002_R01_2025-08-12.pdf (4Gbyte eMMC Samsung)]]

== Software Support ==
*[[COM iMX6ULL Bootloader U-Boot|i.MX6ULL: Bootloader U-Boot]]
*[[COM iMX6ULL Linux|i.MX6ULL: Linux]]
*[[DHCOM Update Mechanism|DHCOM Update Mechanism]]
*[[Yocto | Yocto on DHCOM]]

== BSP Sources==
==== [https://www.denx.de/wiki/U-Boot U-Boot] ====
* [https://github.com/dh-electronics/u-boot-imx6qdl/tree/dev/2018.05_dhcom DH U-Boot (based on v2018.05)]

==== [https://www.kernel.org Linux Kernel] ====
* Mainline
:* [https://github.com/dh-electronics/linux-imx6qdl/tree/release/5.10.131_dhsom/20220725 DH 5.10.131 Release 2022-07-25]

== Download binaries/images ==
==== U-Boot (for eMMC DHCOMs) ====
* [[media:U-boot-with-spl_imx6ull_2018.05-DH_v1.3_emmc-g9725d01f82.imx|DH U-Boot v1.3 (based on v2018.05)]]
: More on how to program it with the U-Boot command "update bootloader ..." on the page [[DHCOM Update Mechanism#Commandline Mode|"DHCOM Update Mechanism"]]

==== Update Kernel ====
* Please contact DH electronics if you need a binary.
: More on how to use it on the page [[DHCOM Update Mechanism|"DHCOM Update Mechanism"]]

==== Debian based images ====
* Debian 10 "Buster" + Kernel 5.10.131 Release 2022-08-19

:* [[media:HD00051_2022-08-19_imx6ull_buster_sdcard_2000MB.img.xz|SD card: 2GB image (xz compressed)]]
:: Open it with Disks by double click on Debian Linux. Use [https://www.balena.io/etcher balenaEtcher] on Windows.

:* [[media:HD00051_2022-08-19_imx6ull_buster_USB_stick_update.zip|eMMC: USB stick update image]]
:: Extract the files on a USB stick (MBR / FAT32) and insert it into your board / device. More about the files on the page [[DHCOM Update Mechanism|"DHCOM Update Mechanism"]]

Hint: You can also progam the eMMC by using the [[COM iMX6ULL Bootloader U-Boot#USB Mass Storage|U-Boot command "ums"]] (usable since U-Boot v2018.05)

File:PCN DHCOR-iMX6ULL-008 R01 2025-11-19.pdf

2025-11-19T14:45:16Z

Ageisreiter:

DHCOM STM32MP1-D2

2025-11-18T14:50:26Z

Ageisreiter: /* Product Change Notifications (PCN) */

{|
|
|
|-
|__TOC__
|[[Image:DHCOM STM32MP1 Pers medres.jpg|600px|DHCOM STM32MP1-D2]]
|}

== Hardware ==

{| class="wikitable" align="center" | style="width: 100%; color: #000000; background: #f3f3f3;" valign="top" |
|-
| style="width: 50%; background: #076b8d; border: 0pt;" |
| style="width: 50%; background: #076b8d; border: 0pt;" |
|-
|valign="top" style="border: 0pt;" |
* '''Dual ARM Cortex®-A7 up to 650 MHz and Single ARM Cortex®-M4 up to 209 MHz'''
* 3D GPU OpenGL® ES2.0 up to 533 MHz, Power Management: STPMIC1A
* TrustZone, cryptography, hash, secure boot
* DDR3L: 256 / 512 / 1024 Mbyte (32 bit)
* eMMC flash: 4 / 8 / 16 GB
* 2 MByte SPI boot flash
* 256 byte EEPROM
* WiFi / Bluetooth: WiFi IEEE 802.11 a/b/g/n, 802.11j (hosted mode) with dual band, Bluetooth® v5.0 (BR/EDR/BLE), PCB antenna and U.FL antenna connector
* On-board microSD card socket
* RTC with temperature compensation ± 3.0 ppm between -40 to +85°C
* Supply voltage range: 3.3 or 5.0 VDC / typ. 1 W-1.5 W (without WiFi/BT)
* Industrial temperature range (-40°C to +85°C)
* SODIMM-200 socket with DHCOM pin assignment
* JTAG debug connection via FFC plug connector or Tag-Connect
* Bus interface: 16 bit asynchron address/data bus, 1 CS
* Ethernet 1: 10 / 100 Mbit with PHY, IEEE 1588v2
* Ethernet 2: 10 / 100 Mbit with PHY
* MMC/SD interface: 4 bit mode
|valign="top" style="border: 0pt;" |
* CAN 1: V2.0B and CAN FD V1.0, TTCAN (time triggered)
* CAN 2: V2.0B and CAN FD V1.0
* UART 1: Rx / Tx / Rts / Cts, up to 12.5 Mbit/s
* UART 2: Rx / Tx / Rts / Cts, up to 12.5 Mbit/s
* UART 3: Rx / Tx, up to 12.5 Mbit/s
* SPI 1: max. 50 Mbit/s
* I2C 1: max. 1 Mbit/s
* I2C 2: max. 1 Mbit/s
* USB host 1: High-Speed
* USB OTG: High-Speed
* Parallel camera: 10 bit interface up to 140 Mbytes/s
* Display RGB: Max. 1366 x 768 pixels, 24 bit
* MIPI®-DSI 2 data lanes up to 1 GHz each
* Touch: 4-wire
* I²S Audio interface
* GPIOs: 24 IOs
* PWM: 1x 16 bit
* Analog: 4x 16 bit ADC and 2x 12 bit DAC
|}

*[[DHCOM STM32MP1 Hardware|Hardware Support]]

== Product Change Notifications (PCN) ==
* [[media:PCN_DHCOM-STM32MP1-001_R01_2020-10-29.pdf|PCN_DHCOM-STM32MP1-001_R01_2020-10-29.pdf (high speed microSD switch EOL)]]
* [[media:PCN_DHCOM-STM32MP1-002_R01_2021-12-23.pdf|PCN_DHCOM-STM32MP1-002_R01_2021-12-23.pdf (microSD socket EOL)]]
* [[media:PCN_DHCOM-STM32MP15-003_R01_2023-05-22.pdf|PCN_DHCOM-STM32MP15-003_R01_2023-05-22.pdf (U-Boot Update)]]
* [[media:PCN_DHCOM-STM32MP15-004_R01_2024-05-15.pdf|PCN_DHCOM-STM32MP15-004_R01_2024-05-15.pdf (SPI flash write-protect information)]]
* [[media:PCN_DHCOM-STM32MP15-005_R01_2024-06-24.pdf|PCN_DHCOM-STM32MP15-005_R01_2024-06-24.pdf (U-Boot Update)]]
* [[media:PCN_DHCOM-STM32MP15-006_R02_2025-11-18.pdf|PCN_DHCOM-STM32MP15-006_R02_2025-11-18.pdf (4Gbyte eMMC Samsung)]]
* [[media:PCN_DHCOM-STM32MP15-007_R01_2025-11-10.pdf|PCN_DHCOM-STM32MP15-007_R01_2025-11-10.pdf (8Gbyte eMMC WD SDINBDG4-8G alternative)]]

== Software Support ==
*[[DHCOM STM32MP1 Bootloader U-Boot|STM32MP1: Bootloader U-Boot]]
*[[DHCOM STM32MP1 Linux|STM32MP1: Linux]]
*[[Debugging_M4_on_STM32MP15xxxx|STM32MP1: Debugging M4]]
*[[Add Yocto SDK with QT5 to QT Creator | Start with Qt]]
*[[U-Boot recovery for STM32MP1 DHSOM via DFU |U-Boot recovery for STM32MP1 DHSOM via DFU]]
*[[DHCOM STM32MP15 Secure Boot | Secure Boot]]

== BSP Sources ==
==== [https://www.denx.de/wiki/U-Boot U-Boot] ====
* [https://github.com/dh-electronics/u-boot-stm32mp1/tree/v2022.07_testbench U-Boot (based on v2022.07)]

==== [https://www.kernel.org Linux Kernel and Yocto] ====
* Mainline
* [https://github.com/dh-electronics/meta-dhsom-stm32-bsp Yocto BSP meta layer --> Github]
* [https://github.com/dh-electronics/kas-dhsom Easy Yocto build via KAS --> Github]

== Download binaries/images ==
=== PDK2 ===
* [[media:Dh-image-demo-dh-stm32mp1-dhcom-pdk2-20211021081919_2021-10-21.rootfs.wic.xz|DH Yocto based Starter Image 2021-10-21 (based on 5.10 kernel)]]
* [[media:HD00066_Debian-Buster-PDK2_2021-11-03.img.gz|DH Debian Starter Image 2021-11-03 (based on 5.10 kernel)]]
=== DRC02 ===
* [[media:Dh-image-demo-dh-stm32mp1-dhcom-drc02-20211021085758_2021-10-11.rootfs.wic.xz|DH Yocto based Starter Image 2021-10-11 (based on 5.10 kernel)]]
* [[media:HD00066_Debian-Buster-DRC02_2021-11-02.img.gz|DH Debian Starter Image 2021-11-02 (based on 5.10 kernel)]]
=== picoITX ===
* [[media:Dh-image-demo-dh-stm32mp1-dhcom-picoitx_2021-10-21.wic.xz|DH Yocto based Starter Image 2021-10-21 (based on 5.10 kernel)]]
* [[media:DH00066_Debian-Buster-picoITX_2022-01-03.img.gz|DH Debian Starter Image 2022-01-03 (based on 5.10 kernel)]]

File:PCN DHCOM-STM32MP15-006 R02 2025-11-18.pdf

2025-11-18T14:50:02Z

Ageisreiter:

DHCOM iMX6-D2

2025-11-17T18:52:53Z

Ageisreiter: /* Product Change Notifications (PCN) */

{|
|
|
|-
|__TOC__
|[[Image:IM6Modul.png|600px|COM iMX6-D2]]
|}

== Hardware ==

{| class="wikitable" align="center" | style="width: 100%; color: #000000; background: #f3f3f3;" valign="top" |
|-
| style="width: 50%; background: #076b8d; border: 0pt;" |
| style="width: 50%; background: #076b8d; border: 0pt;" |
|-
|valign="top" style="border: 0pt;" |
* '''Cortex-A9 Freescale i.MX6 Solo/DualLite/Dual/Quad up to 1.2GHz'''
* 2D (GC320) / 3D (GC880/GC2000) graphics accelerator
* 128 - 1024 MByte NAND flash memory (8 bit bus width) or 4 - 16 GByte eMMC flash (8 bit bus width)
* 2 MB SPI boot flash
* 256 - 2048 MByte DDR3-1066 or DDR3-800
* On module microSD card socket (4 bit SDIO) [1]
* SD/MMC card interface, 4 bit SDIO
* LC display controller, 24 bit colors, 2048x1536 pixels
* LVDS 4-channel, max. 165 Mpixels/s
* On-board touch controller for 4-wire resistive touch screens
* Ethernet controller 10/100 Mbit, IEEE1588 conform
* USB 2.0 OTG high-speed
* USB 2.0 host high speed
* Full function UART [2]
* Standard UART with hardware handshake support
* Standard UART
 [1] On module microSD card socket is only available if second CAN port is not connected.
 [2] CTS and RTS is only available if second CAN port is not connected.
|valign="top" style="border: 0pt;" |
* 2x CAN interface [1][2]
* 2x SPI interface
* 2x I²C interface
* I²S Audio codec (1 x microphone, 1 x Line in, 1x Line out)
* Real-time clock (I²C connection), low power temperature compensated
* 12 bit analog input
* 128 Bytes EEPROM with integrated MAC address
* 16 bit address/databus interface on SODIMM-200 socket
* PWM channel
* 24 GPIOs (A-W + INT_HI_PRIO)
* JTAG debug connection via FFC plug connector
* Industrial temperature range (-40°C to +85°C)
* SODIMM-200 socket with DHCOM pin assignment
|}

*[[COM iMX6 Hardware|Hardware Support]]

== Product Change Notifications (PCN) ==
* [[media:PCN_iMX6_R01_2017-08-17.pdf|PCN_iMX6_R01_2017-08-17.pdf (4GByte eMMC)]]
* [[media:PCN_iMX6_R02_2017-08-17.pdf|PCN_iMX6_R02_2017-08-17.pdf (8GByte eMMC)]]
* [[media:PCN_iMX6_R03_2017-09-20.pdf|PCN_iMX6_R03_2017-09-20.pdf (SW ethernet bug)]]
* [[media:PCN_iMX6_R04_2017-09-25.pdf|PCN_iMX6_R04_2017-09-25.pdf (Molex microSD socket)]]
* [[media:PCN_iMX6_R05_2018-01-10.pdf|PCN_iMX6_R05_2018-01-10.pdf (512MB NAND flash)]]
* [[media:PCN_iMX6_R06_2018-10-09.pdf|PCN_iMX6_R06_2018-10-09.pdf (label change)]]
* [[media:PCN_iMX6_R07_2019-11-13.pdf|PCN_iMX6_R07_2019-11-13.pdf (4GByte eMMC)]]
* [[media:PCN_iMX6_R08_2019-11-13.pdf|PCN_iMX6_R08_2019-11-13.pdf (8GByte eMMC)]]
* [[media:PCN_iMX6-009_R01_2021-07-20.pdf|PCN_iMX6-009_R01_2021-07-20.pdf (SPI flash EOL)]]
* [[media:PCN_DHCOM-iMX6-010_R01_2021-12-23.pdf|PCN_DHCOM-iMX6-010_R01_2021-12-23.pdf (microSD socket EOL)]]
* [[media:PCN_DHCOM-iMX6-011_R01_2022-07-18.pdf|PCN_DHCOM-iMX6-011_R01_2022-07-18.pdf (adress latch)]]
* [[media:PCN_DHCOM-iMX6-012_R01_2025-07-28.pdf|PCN_DHCOM-iMX6-012_R01_2025-07-28.pdf (reset monitor)]]
* [[media:PCN_DHCOM-iMX6-013_R02_2025-11-17.pdf|PCN_DHCOM-iMX6-013_R02_2025-11-17.pdf (4Gbyte eMMC Samsung)]]

== Software Support ==
*[[COM iMX6 Bootloader U-Boot|i.MX6: Bootloader U-Boot]]
*[[COM iMX6 Linux|i.MX6: Linux]]
*[[DHCOM Update Mechanism|DHCOM Update Mechanism]]
* [https://github.com/dh-electronics/meta-dhsom-imx-bsp Yocto BSP meta layer --> Github]
* [https://github.com/dh-electronics/kas-dhsom Easy Yocto build via KAS --> Github]
*[[COM iMX6 WinCE|i.MX6: WinCE]]

== BSP Sources==
==== [https://www.denx.de/wiki/U-Boot U-Boot] ====
* [https://github.com/dh-electronics/u-boot-imx6qdl/tree/dev/legacy/2018.05_dhcom DH U-Boot (based on v2018.05)]
* [https://github.com/dh-electronics/u-boot-imx6qdl/tree/dev/2015.10_dhcom DH U-Boot (based on v2015.10)(deprecated)]
* [https://github.com/dh-electronics/u-boot-imx6qdl/tree/dev/2013.10_dhcom DH U-Boot (based on v2013.10)(deprecated)]

==== [https://www.kernel.org Linux Kernel] ====
* Mainline
:* [https://github.com/dh-electronics/linux-imx6qdl/tree/release/5.10.131_dhsom/20220725 DH 5.10.131 Release 2022-07-25]
* NXP Vendor
:* [https://github.com/dh-electronics/linux-imx6-vendor/tree/release/v4.1.15/20190926 DH 4.1.15 Release 2019-09-26]
:* [https://github.com/dh-electronics/linux-imx6-vendor/tree/release/v3.10.17/20170804 DH 3.10.17 Release 2017-08-04]

== Download binaries/images ==
==== U-Boot (for eMMC DHCOMs) ====
* [[media:U-boot-with-spl_imx6_v2.4.0.0_emmc.imx|DH U-Boot v2.4.0.0 (based on v2018.05)]]
* [[media:V1-1-0-8_u-boot-imx6qdl.tar.xz|DH U-Boot v1.1.0.8 (based on v2015.10)]]
: More on how to program it with the U-Boot command "update bootloader ..." on the page [[DHCOM Update Mechanism#Commandline Mode|"DHCOM Update Mechanism"]]

==== Update Kernel ====
* Please contact DH electronics if you need a binary.
: More on how to use it on the page [[DHCOM Update Mechanism|"DHCOM Update Mechanism"]]

==== Debian based images ====
* Debian 10 "Buster" + Kernel 5.10.131 Release 2022-08-19
: Note: Devicetree is set to "imx6q-dhcom-pdk2.dtb" in uLinuxEnv.txt

:* [[media:HD00035_2022-08-19_imx6_buster_sdcard_2000MB.img.xz|SD card: 2GB image (xz compressed)]]
:: Open it with Disks by double click on Debian Linux. Use [https://www.balena.io/etcher balenaEtcher] on Windows.

:* [[media:HD00035_2022-08-19_imx6_buster_USB_stick_update.zip|eMMC: USB stick update image]]
:: Extract the files on a USB stick (MBR / FAT32) and insert it into your board / device. More about the files on the page [[DHCOM Update Mechanism|"DHCOM Update Mechanism"]]

* Debian 8 "Jessie" with Qt5.9.1 + Vendor Kernel 4.1.15 Release 2019-09-26

:* [[media:HD00039_2019-09-26_imx6_jessie_qt5.9.1_sdcard_2000MB.img.xz|SD card: 2GB image (xz compressed)]]
:: Open it with Disks by double click on Debian Linux. Use [https://www.balena.io/etcher balenaEtcher] on Windows.

:* [[media:HD00039_2019-09-26_imx6_jessie_qt5.9.1_USB_stick_update.zip|eMMC: USB stick update image]]
:: Extract the files on a USB stick (MBR / FAT32) and insert it into your board / device. More about the files on the page [[DHCOM Update Mechanism|"DHCOM Update Mechanism"]]

Hint: You can also progam the eMMC by using the [[COM iMX6 Bootloader U-Boot#USB Mass Storage|U-Boot command "ums"]] (usable since U-Boot v2018.05)

== Download Linux code examples ==
==== [[Virtual Machine for Application Development#Code Examples for Userspace-Applications to Access SPI, I2C, GPIOs, and more|Code Examples for Userspace-Applications to Access SPI, I2C, GPIOs, and more]] ====

== Download WEC ==
==== WEC7 DHHalLib.dll (function library) ====
* [[media:DHHalLib_WEC7_R11_2022-05-11.zip|Download DHHalLib Library Version 1.3.0.7]]
* [[media:DHHalLib_Test_App_Source_WEC7_R10_2022-04-06.zip|DHHalLib Demo App Source Code ]]
* [[media:DHHalLib_Test_App_Binary_WEC7_R10_2022-04-06.zip|DHHalLib Demo App Binary File]]
* [[media:CSharp_LibWrapper_Source_WEC7_R09_2022-03-18.zip|Download DHHalLib CSharp Wrapper]]
* [[media:CSharp_LibWrapper.zip|Download DHHalLib CSharp Demo Wrapper App ]]
* [[media:CSharp_LibWrapper_Binary.zip|Download DHHalLib CSharp Demo Wrapper App Binary File]]

==== WEC7 binary BSP ====
* [[media:2016-05-19_DHCOM_iMX6_BSP_BIN.zip|Download WEC7 binary BSP (date: 2016-05-19)]]

==== WEC2013 DHHalLib.dll (function library) ====
* [[media:DHHalLib_WEC2013_R12_2021-10-01.zip|Download DHHalLib Library Version 1.4.2.2]]
* [[media:DHHalLib_Test_App_Source_WEC2013_R07_2018_06_12.zip|DHHalLib Demo App Source Code ]]
* [[media:DHHalLib_Test_App_Binary_WEC2013_R09_2021-10-01.zip|DHHalLib Demo App Binary File]]
* [[media:CSharp_LibWrapper_Source_WEC2013_R07_2021-10-01.zip|Download DHHalLib CSharp Wrapper]]
* [[media:CSharp_DHHalLib_Wrapper_App_Source_WEC2013_R05_2017_08_08.zip|DHHalLib C# Demo App Source Code]]
* [[media:CSharp_DHHalLib_Wrapper_App_Binary_WEC2013_R05_2017_08_08.zip|DHHalLib C# Demo App Binary File]]

File:PCN DHCOM-iMX6-013 R02 2025-11-17.pdf

2025-11-17T18:52:22Z

Ageisreiter:

DHCOM STM32MP1-D2

2025-11-10T15:02:04Z

Ageisreiter: /* Product Change Notifications (PCN) */

{|
|
|
|-
|__TOC__
|[[Image:DHCOM STM32MP1 Pers medres.jpg|600px|DHCOM STM32MP1-D2]]
|}

== Hardware ==

{| class="wikitable" align="center" | style="width: 100%; color: #000000; background: #f3f3f3;" valign="top" |
|-
| style="width: 50%; background: #076b8d; border: 0pt;" |
| style="width: 50%; background: #076b8d; border: 0pt;" |
|-
|valign="top" style="border: 0pt;" |
* '''Dual ARM Cortex®-A7 up to 650 MHz and Single ARM Cortex®-M4 up to 209 MHz'''
* 3D GPU OpenGL® ES2.0 up to 533 MHz, Power Management: STPMIC1A
* TrustZone, cryptography, hash, secure boot
* DDR3L: 256 / 512 / 1024 Mbyte (32 bit)
* eMMC flash: 4 / 8 / 16 GB
* 2 MByte SPI boot flash
* 256 byte EEPROM
* WiFi / Bluetooth: WiFi IEEE 802.11 a/b/g/n, 802.11j (hosted mode) with dual band, Bluetooth® v5.0 (BR/EDR/BLE), PCB antenna and U.FL antenna connector
* On-board microSD card socket
* RTC with temperature compensation ± 3.0 ppm between -40 to +85°C
* Supply voltage range: 3.3 or 5.0 VDC / typ. 1 W-1.5 W (without WiFi/BT)
* Industrial temperature range (-40°C to +85°C)
* SODIMM-200 socket with DHCOM pin assignment
* JTAG debug connection via FFC plug connector or Tag-Connect
* Bus interface: 16 bit asynchron address/data bus, 1 CS
* Ethernet 1: 10 / 100 Mbit with PHY, IEEE 1588v2
* Ethernet 2: 10 / 100 Mbit with PHY
* MMC/SD interface: 4 bit mode
|valign="top" style="border: 0pt;" |
* CAN 1: V2.0B and CAN FD V1.0, TTCAN (time triggered)
* CAN 2: V2.0B and CAN FD V1.0
* UART 1: Rx / Tx / Rts / Cts, up to 12.5 Mbit/s
* UART 2: Rx / Tx / Rts / Cts, up to 12.5 Mbit/s
* UART 3: Rx / Tx, up to 12.5 Mbit/s
* SPI 1: max. 50 Mbit/s
* I2C 1: max. 1 Mbit/s
* I2C 2: max. 1 Mbit/s
* USB host 1: High-Speed
* USB OTG: High-Speed
* Parallel camera: 10 bit interface up to 140 Mbytes/s
* Display RGB: Max. 1366 x 768 pixels, 24 bit
* MIPI®-DSI 2 data lanes up to 1 GHz each
* Touch: 4-wire
* I²S Audio interface
* GPIOs: 24 IOs
* PWM: 1x 16 bit
* Analog: 4x 16 bit ADC and 2x 12 bit DAC
|}

*[[DHCOM STM32MP1 Hardware|Hardware Support]]

== Product Change Notifications (PCN) ==
* [[media:PCN_DHCOM-STM32MP1-001_R01_2020-10-29.pdf|PCN_DHCOM-STM32MP1-001_R01_2020-10-29.pdf (high speed microSD switch EOL)]]
* [[media:PCN_DHCOM-STM32MP1-002_R01_2021-12-23.pdf|PCN_DHCOM-STM32MP1-002_R01_2021-12-23.pdf (microSD socket EOL)]]
* [[media:PCN_DHCOM-STM32MP15-003_R01_2023-05-22.pdf|PCN_DHCOM-STM32MP15-003_R01_2023-05-22.pdf (U-Boot Update)]]
* [[media:PCN_DHCOM-STM32MP15-004_R01_2024-05-15.pdf|PCN_DHCOM-STM32MP15-004_R01_2024-05-15.pdf (SPI flash write-protect information)]]
* [[media:PCN_DHCOM-STM32MP15-005_R01_2024-06-24.pdf|PCN_DHCOM-STM32MP15-005_R01_2024-06-24.pdf (U-Boot Update)]]
* [[media:PCN_DHCOM-STM32MP15-006_R01_2025-08-12.pdf|PCN_DHCOM-STM32MP15-006_R01_2025-08-12.pdf (4Gbyte eMMC Samsung)]]
* [[media:PCN_DHCOM-STM32MP15-007_R01_2025-11-10.pdf|PCN_DHCOM-STM32MP15-007_R01_2025-11-10.pdf (8Gbyte eMMC WD SDINBDG4-8G alternative)]]

== Software Support ==
*[[DHCOM STM32MP1 Bootloader U-Boot|STM32MP1: Bootloader U-Boot]]
*[[DHCOM STM32MP1 Linux|STM32MP1: Linux]]
*[[Debugging_M4_on_STM32MP15xxxx|STM32MP1: Debugging M4]]
*[[Add Yocto SDK with QT5 to QT Creator | Start with Qt]]
*[[U-Boot recovery for STM32MP1 DHSOM via DFU |U-Boot recovery for STM32MP1 DHSOM via DFU]]
*[[DHCOM STM32MP15 Secure Boot | Secure Boot]]

== BSP Sources ==
==== [https://www.denx.de/wiki/U-Boot U-Boot] ====
* [https://github.com/dh-electronics/u-boot-stm32mp1/tree/v2022.07_testbench U-Boot (based on v2022.07)]

==== [https://www.kernel.org Linux Kernel and Yocto] ====
* Mainline
* [https://github.com/dh-electronics/meta-dhsom-stm32-bsp Yocto BSP meta layer --> Github]
* [https://github.com/dh-electronics/kas-dhsom Easy Yocto build via KAS --> Github]

== Download binaries/images ==
=== PDK2 ===
* [[media:Dh-image-demo-dh-stm32mp1-dhcom-pdk2-20211021081919_2021-10-21.rootfs.wic.xz|DH Yocto based Starter Image 2021-10-21 (based on 5.10 kernel)]]
* [[media:HD00066_Debian-Buster-PDK2_2021-11-03.img.gz|DH Debian Starter Image 2021-11-03 (based on 5.10 kernel)]]
=== DRC02 ===
* [[media:Dh-image-demo-dh-stm32mp1-dhcom-drc02-20211021085758_2021-10-11.rootfs.wic.xz|DH Yocto based Starter Image 2021-10-11 (based on 5.10 kernel)]]
* [[media:HD00066_Debian-Buster-DRC02_2021-11-02.img.gz|DH Debian Starter Image 2021-11-02 (based on 5.10 kernel)]]
=== picoITX ===
* [[media:Dh-image-demo-dh-stm32mp1-dhcom-picoitx_2021-10-21.wic.xz|DH Yocto based Starter Image 2021-10-21 (based on 5.10 kernel)]]
* [[media:DH00066_Debian-Buster-picoITX_2022-01-03.img.gz|DH Debian Starter Image 2022-01-03 (based on 5.10 kernel)]]

File:PCN DHCOM-STM32MP15-007 R01 2025-11-10.pdf

2025-11-10T15:01:15Z

Ageisreiter:

DHSBC STM32MP13 DFU and UMS usage

2025-11-04T16:42:40Z

Ageisreiter: /* Preparation */

<div class="toclimit-3">__TOC__</div>

== Requirements ==
=== Software ===
* Linux host computer ([[Virtual Machine for Application Development]] is used in this guide)
* [https://packages.debian.org/stable/dfu-util dfu-util] (for DFU boot mode)

=== Hardware ===
* DHSBC STM32MP13 board
* USB-A to Type-C cable (for DFU and UMS data connection)
* Type-C power supply for DHCBS STM32Mp13 board
* FTDI cable TTL-232R-3V3 for console connection

== Preparation ==
This installation was made on the [[Virtual Machine for Application Development]].
All console expressions refer to this Debian system, but any other debian based system should also work.

'''BOOT MODES'''
:{| class="wikitable" style="width: 400px"
||USB (DFU)||<tt>000b</tt>
|-
||SPI Flash ||<tt>001b</tt>
|}
'''NOTE:'''
* First Board revision 719-100 -> ON means 0 -> SPI Flash boot: bit 1 = OFF, bit 2,3 = ON!
* NEW Board revision 719-300 -> ON means 1 -> SPI Flash boot: bit 1 = ON, bit 2,3 = OFF!

=== Install dfu-util (debian) ===
<syntaxhighlight lang="shell">
apt-get install dfu-util
</syntaxhighlight>
<syntaxhighlight lang="console">
</syntaxhighlight>

=== Collect artifacts from OE build:===
* tf-a-stm32mp135f-dhcor-dhsbc.stm32-stm32mp1
* fip.bin-stm32mp1
* *image*.wic

=== Start U-Boot via USB DFU upload:===

:'''>>> Connecting USB Data and FTDI console port. Open a terminal program (PuTTY or TeraTerm) for serial console connection.'''

:'''>>> Switch boot mode to 123=OFF-OFF-OFF (USB DFU boot)''' / Note: Old Hardware 123=ON-ON-ON

:'''>>> Power on the board'''

:'''>>> DFU device apears on Linux host computer'''

<syntaxhighlight lang="shell">
$ dfu-util -a 0 -D tf-a-stm32mp135f-dhcor-dhsbc.stm32 -R
$ dfu-util -a 0 -D fip.bin -R
</syntaxhighlight>
<syntaxhighlight lang="console">
</syntaxhighlight>

=== Install bootloader to SPI NOR:===
* U-Boot side:
<syntaxhighlight lang="shell">
=> sf probe
=> env set dfu_alt_info "mtd nor0=fsbl1 raw 0x0 0x40000;fsbl2 raw 0x40000 0x40000;uboot raw 0x80000 0x160000;env1 raw 0x3e0000 0x10000;env2 raw 0x3f0000 0x10000"
=> dfu 0 mtd
</syntaxhighlight>
<syntaxhighlight lang="console">
</syntaxhighlight>
* Host PC side
<syntaxhighlight lang="shell">
$ dfu-util -a 2 -D fip.bin
$ dfu-util -a 1 -D tf-a-stm32mp135f-dhcor-dhsbc.stm32
$ dfu-util -a 0 -D tf-a-stm32mp135f-dhcor-dhsbc.stm32
</syntaxhighlight>
<syntaxhighlight lang="console">
</syntaxhighlight>

:'''>>> Power off the board, switch boot mode to 123=ON-OFF-OFF (QSPI NOR boot)''' / Note: Old Hardware 123=OFF-ON-ON

=== Reset Environment to default of new bootloader===
<syntaxhighlight lang="shell">
=> env default -a
=> saveenv
=> saveenv
</syntaxhighlight>
<syntaxhighlight lang="console">
</syntaxhighlight>
Note: saveenv is called twice, because it also updates the redundant ENV to the new version.

=== Install root filesystem to eMMC:===
*U-Boot side:
<syntaxhighlight lang="shell">
=> ums 0 mmc 0
</syntaxhighlight>
<syntaxhighlight lang="console">
</syntaxhighlight>
* Host PC side
<syntaxhighlight lang="shell">
$ dd if=*image*wic of=/dev/sdX bs=4M
</syntaxhighlight>
<syntaxhighlight lang="console">
</syntaxhighlight>

:'''>>> Power off the board, switch boot mode to 123=ON-OFF-OFF (QSPI NOR boot)''' / Note: Old Hardware 123=OFF-ON-ON

:'''>>> Power on and boot'''

DHSBC STM32MP13 DFU and UMS usage

2025-11-04T16:35:47Z

Ageisreiter: /* Preparation */

<div class="toclimit-3">__TOC__</div>

== Requirements ==
=== Software ===
* Linux host computer ([[Virtual Machine for Application Development]] is used in this guide)
* [https://packages.debian.org/stable/dfu-util dfu-util] (for DFU boot mode)

=== Hardware ===
* DHSBC STM32MP13 board
* USB-A to Type-C cable (for DFU and UMS data connection)
* Type-C power supply for DHCBS STM32Mp13 board
* FTDI cable TTL-232R-3V3 for console connection

== Preparation ==
This installation was made on the [[Virtual Machine for Application Development]].
All console expressions refer to this Debian system, but any other debian based system should also work.

'''BOOT MODES'''
:{| class="wikitable" style="width: 400px"
||USB (DFU)||<tt>000b</tt>
|-
||SPI Flash ||<tt>001b</tt>
|}
'''NOTE:'''
* First Board revision 719-100 -> ON means 0 -> SPI Flash boot: bit 1 = OFF, bit 2,3 = ON!
* NEW Board revision 719-300 -> ON means 1 -> SPI Flash boot: bit 1 = ON, bit 2,3 = OFF!

=== Install dfu-util (debian) ===
<syntaxhighlight lang="shell">
apt-get install dfu-util
</syntaxhighlight>
<syntaxhighlight lang="console">
</syntaxhighlight>

=== Collect artifacts from OE build:===
* tf-a-stm32mp135f-dhcor-dhsbc.stm32-stm32mp1
* fip.bin-stm32mp1
* *image*.wic

=== Start U-Boot via USB DFU upload:===

:'''>>> Connecting USB Data and FTDI console port. Open a terminal program (PuTTY or TeraTerm) for serial console connection.'''

:'''>>> Switch boot mode to 123=OFF-OFF-OFF (USB DFU boot) / Note: Old Hardware 123=ON-ON-ON'''

:'''>>> Power on the board'''

:'''>>> DFU device apears on Linux host computer'''

<syntaxhighlight lang="shell">
$ dfu-util -a 0 -D tf-a-stm32mp135f-dhcor-dhsbc.stm32 -R
$ dfu-util -a 0 -D fip.bin -R
</syntaxhighlight>
<syntaxhighlight lang="console">
</syntaxhighlight>

=== Install bootloader to SPI NOR:===
* U-Boot side:
<syntaxhighlight lang="shell">
=> sf probe
=> env set dfu_alt_info "mtd nor0=fsbl1 raw 0x0 0x40000;fsbl2 raw 0x40000 0x40000;uboot raw 0x80000 0x160000;env1 raw 0x3e0000 0x10000;env2 raw 0x3f0000 0x10000"
=> dfu 0 mtd
</syntaxhighlight>
<syntaxhighlight lang="console">
</syntaxhighlight>
* Host PC side
<syntaxhighlight lang="shell">
$ dfu-util -a 2 -D fip.bin
$ dfu-util -a 1 -D tf-a-stm32mp135f-dhcor-dhsbc.stm32
$ dfu-util -a 0 -D tf-a-stm32mp135f-dhcor-dhsbc.stm32
</syntaxhighlight>
<syntaxhighlight lang="console">
</syntaxhighlight>

:'''>>> Power off the board, switch boot mode to 123=ON-OFF-OFF (QSPI NOR boot) / Note: Old Hardware 123=OFF-ON-ON'''

=== Reset Environment to default of new bootloader===
<syntaxhighlight lang="shell">
=> env default -a
=> saveenv
=> saveenv
</syntaxhighlight>
<syntaxhighlight lang="console">
</syntaxhighlight>
Note: saveenv is called twice, because it also updates the redundant ENV to the new version.

=== Install root filesystem to eMMC:===
*U-Boot side:
<syntaxhighlight lang="shell">
=> ums 0 mmc 0
</syntaxhighlight>
<syntaxhighlight lang="console">
</syntaxhighlight>
* Host PC side
<syntaxhighlight lang="shell">
$ dd if=*image*wic of=/dev/sdX bs=4M
</syntaxhighlight>
<syntaxhighlight lang="console">
</syntaxhighlight>

:'''>>> Power off the board, switch boot mode to 123=ON-OFF-OFF (QSPI NOR boot) / Note: Old Hardware 123=OFF-ON-ON'''

:'''>>> Power on and boot'''

DHCOM iMX8-D2

2025-11-04T09:03:40Z

Ageisreiter: /* Product Change Notifications (PCN) */

{|
|
|
|-
|__TOC__
|[[Image:DHCOM-iMX8N_Plus_pers_medres.jpg|600px|DHCOM iMX8-D2]]
|}

== Hardware ==

{| class="wikitable" align="center" | style="width: 100%; color: #000000; background: #f3f3f3;" valign="top" |
|-
| style="width: 50%; background: #076b8d; border: 0pt;" |
| style="width: 50%; background: #076b8d; border: 0pt;" |
|-
|valign="top" style="border: 0pt;" |
* '''Quad Cortex-A53 processor NXP i.MX8M-Plus up to 1.8GHz'''
* Real-time control, machine learning, AI, advanced multimedia, industrial automation.
* NPU with up to 2.3 TOPS enables matrix calculations e.g. for pattern, speech, object recognition
* Advanced image and video processing via video encoding and decoding
* Compatible with other modules from the DHCOM family (SODIMM-200 socket)
* No heat sink necessary thanks to 5-Cent Cooling Solution
* Guaranteed long-term availability of 10+ years
|}

*[[COM iMX8 Hardware|Hardware Support]]

== Product Change Notifications (PCN) ==
* [[media:PCN_DHCOM-i.MX8MP-001_R01_2025-10-31.pdf|PCN_DHCOM-i.MX8MP-001_R01_2025-10-31.pdf (16GByte eMMC EOL)]]
* [[media:PCN_DHCOM-i.MX8MP-002_R01_2025-11-04.pdf|PCN_DHCOM-i.MX8MP-002_R01_2025-11-04.pdf (32GByte eMMC EOL)]]
* [[media:PCN_DHCOM-i.MX8MP-003_R01_2025-10-31.pdf|PCN_DHCOM-i.MX8MP-003_R01_2025-10-31.pdf (16GByte eMMC poorly available)]]

== Software ==
* [https://github.com/dh-electronics/meta-dhsom-imx-bsp Yocto BSP meta layer --> Github]
* [https://github.com/dh-electronics/kas-dhsom Easy Yocto build via KAS --> Github]

File:PCN DHCOM-i.MX8MP-002 R01 2025-11-04.pdf

2025-11-04T09:03:01Z

Ageisreiter:

DHCOM iMX8-D2

2025-10-31T08:38:40Z

Ageisreiter: /* Hardware */

{|
|
|
|-
|__TOC__
|[[Image:DHCOM-iMX8N_Plus_pers_medres.jpg|600px|DHCOM iMX8-D2]]
|}

== Hardware ==

{| class="wikitable" align="center" | style="width: 100%; color: #000000; background: #f3f3f3;" valign="top" |
|-
| style="width: 50%; background: #076b8d; border: 0pt;" |
| style="width: 50%; background: #076b8d; border: 0pt;" |
|-
|valign="top" style="border: 0pt;" |
* '''Quad Cortex-A53 processor NXP i.MX8M-Plus up to 1.8GHz'''
* Real-time control, machine learning, AI, advanced multimedia, industrial automation.
* NPU with up to 2.3 TOPS enables matrix calculations e.g. for pattern, speech, object recognition
* Advanced image and video processing via video encoding and decoding
* Compatible with other modules from the DHCOM family (SODIMM-200 socket)
* No heat sink necessary thanks to 5-Cent Cooling Solution
* Guaranteed long-term availability of 10+ years
|}

*[[COM iMX8 Hardware|Hardware Support]]

== Product Change Notifications (PCN) ==
* [[media:PCN_DHCOM-i.MX8MP-001_R01_2025-10-31.pdf|PCN_DHCOM-i.MX8MP-001_R01_2025-10-31.pdf (16GByte eMMC EOL)]]
* [[media:PCN_DHCOM-i.MX8MP-003_R01_2025-10-31.pdf|PCN_DHCOM-i.MX8MP-003_R01_2025-10-31.pdf (16GByte eMMC poorly available)]]

== Software ==
* [https://github.com/dh-electronics/meta-dhsom-imx-bsp Yocto BSP meta layer --> Github]
* [https://github.com/dh-electronics/kas-dhsom Easy Yocto build via KAS --> Github]

File:PCN DHCOM-i.MX8MP-003 R01 2025-10-31.pdf

2025-10-31T08:37:27Z

Ageisreiter:

File:PCN DHCOM-i.MX8MP-001 R01 2025-10-31.pdf

2025-10-31T08:37:10Z

Ageisreiter:

Main Page

2025-10-29T07:11:05Z

Ageisreiter:

__NOTOC__
{| style="width: 100%; color: #000000; border-spacing: 2px; border: 1px solid darkgray;" valign="top" |
| style="width: 25%; text-align: center;" |
| style="width: 50%; text-align: center;" |
| style="width: 25%; text-align: center;" |
|-
| style="text-align: center;" | [[Image:Welcome.jpg|200px|Welcome to DH electronics MediaWiki]]
| style="text-align: center;" | [[Image:LOGO_DH_electronics-SMALL.jpg|200px|Welcome to DH electronics MediaWiki]]
| style="text-align: center;" | [[Image:Mediawiki.jpg|183px|Welcome to DH electronics MediaWiki]]
|}

''Welcome to DH electronics MediaWiki. This Wiki has the aim to provide our customers technical support for DH electronics products.''

{| style="width: 100%; color: #000000; border-collapse:collapse; border: darkgray; border-style: solid; border-width: 1px 0 1px 0"
|
|style="padding:10px;"|
=== [[DHSBC STM32MP2x]] ===

Single Board Computer based on the solderable DHCOS STM32MP2x.

Click '''[[DHSBC_STM32MP2x|here]]''' to get support information for our '''[[DHSBC_STM32MP2x|STM32MP25]]''' products.
| style="text-align: right; border: darkgray; border-style: solid; border-width: 1px 0 0 0;" |[[Image:DHSBC STM32MP2-Pers-medres.jpg|center|350px|DHSBC STM32MP25|link=DHSBC_STM32MP2x]]

|-
|style="border: darkgray; border-style: solid; border-width: 1px 0 0 0;"|
|style="padding:10px; border: darkgray; border-style: solid; border-width: 1px 0 0 0;"|

=== [[DHSBC STM32MP13]] ===

Single Board Computer based on the solderable DHCOR STM32MP13.

Click '''[[DHSBC_STM32MP13|here]]''' to get support information for our '''[[DHSBC_STM32MP13|STM32MP13]]''' products.
| style="text-align: right; border: darkgray; border-style: solid; border-width: 1px 0 0 0;" |[[Image:DHCOR-STM32MP13_Pers_medres.png|center|350px|DHSBC STM32MP13|link=DHSBC_STM32MP13]]

|-
|style="border: darkgray; border-style: solid; border-width: 1px 0 0 0;"|
|style="padding:10px; border: darkgray; border-style: solid; border-width: 1px 0 0 0;"|

=== [[Avenger96]] ===

The AVENGER Board is a 96Boards compliant consumer edition board based on the STM32MP15 series of SoCs.

Click '''[[Avenger96|here]]''' to get support information for our '''[[Avenger96]]''' products.
| style="text-align: right; border: darkgray; border-style: solid; border-width: 1px 0 0 0;" |[[Image:Avenger96_Pers.png|center|350px|Avenger96|link=Avenger96]]

|-
|style="border: darkgray; border-style: solid; border-width: 1px 0 0 0;"|
|style="padding:10px; border: darkgray; border-style: solid; border-width: 1px 0 0 0;"|

=== [[DHSOM|DHSOM]] ===

A '''System On Module''' (SOM) is a powerful embedded computer on a compact circuit board.

Our DHCOM modules offer high performance coupled with extensive features and interfaces, low power consumption
as well as compact size.Possible applications for our modules are in visualization, multimedia, automation and communication devices

Click '''[[DHSOM|here]]''' to get support information for our '''[[DHSOM|DHSOM]]''' products.
| style="text-align: right;" |[[Image:IM6Modul.png|center|300px|COM iMX6-D2|link=DHSOM]]
|-
|style="border: darkgray; border-style: solid; border-width: 1px 0 0 0;"|
|style="padding:10px; border: darkgray; border-style: solid; border-width: 1px 0 0 0;"|

=== [[DHMI]] ===

DHMI is our HMI systems (Human-Machine Interface) product range. The standard series are equipped with resistive or capacitive touch displays and our SOM.

Click '''[[DHMI|here]]''' to get support information for our '''[[DHMI]]''' products.
| style="text-align: right; border: darkgray; border-style: solid; border-width: 1px 0 0 0;" |[[Image:HMI_7_mit_Rahmen_Display_medres_wiki.png|center|350px|DHMI|link=DHMI]]

|-
|style="border: darkgray; border-style: solid; border-width: 1px 0 0 0;"|
|style="padding:10px; border: darkgray; border-style: solid; border-width: 1px 0 0 0;"|
=== [[DHCON]] ===

Our DHCON products are optimized for smart home & building as well as Industry 4.0 and IoT applications.

Click '''[[DHCON|here]]''' to get support information for our '''[[DHCON]]''' products.
| style="text-align: right; border: darkgray; border-style: solid; border-width: 1px 0 0 0;" |[[Image:IN-RAIL.png|center|350px|DHCON|link=DHCON]]
|-
|style="border: darkgray; border-style: solid; border-width: 1px 0 0 0;"|
|style="padding:10px; border: darkgray; border-style: solid; border-width: 1px 0 0 0;"|

=== [[Image:XLON Logo in Schwarz von SD Kopie.jpg|120px|DH electronics XLON|link=XLON]] ===

'''XLON''' products are network interfaces and infrastructure components for LonWorks technology.

Click '''[[XLON|here]]''' to get support information for our '''[[XLON]]''' products.
| style="text-align: right; border: darkgray; border-style: solid; border-width: 1px 0 0 0;" |[[Image:XLON U10.png|center|275px|XLON U10|link=XLON]]

|style="padding:10px; border: darkgray; border-style: solid; border-width: 1px 0 0 0;"|

|}

File:DHSBC STM32MP2-Pers-medres.jpg

2025-10-29T07:08:11Z

Ageisreiter:

DHSBC STM32MP2x

2025-10-02T15:29:07Z

Ageisreiter: /* Software */

'''The DHSBC STM32MP25 board is the official DHCOS STM32MP25x reference design!'''

{|
|
|
|-
|__TOC__
|[[Image:DHSBC_STM32MP2-Top-medres.jpg|600px|DHSBC STM32MP2]]
|}

== Introduction ==
Reference design for secure industrial IoT devices based on STM32MP25

* Single Board Computer based on solderable, pin-compatible DHCOS STM32MP25 SOM
* Industrial grade, 10+ years available
* Mainline Linux support (also for Vivante GPU)
* Security Features e.g. Secure Boot / Storage
* Connectivity: Gbit Ethernet, WiFi/BT
* Multimedia: 3D GPU, display, video, camera
* STPMIC25 supports low power modes

== Technical Details ==
{| class="wikitable" align="center" | style="width: 100%; color: #000000; background: #f3f3f3;" valign="top" |
|-
| style="width: 50%; background: #076b8d; border: 0pt;" |
| style="width: 50%; background: #076b8d; border: 0pt;" |
|-
|valign="top" style="border: 0pt;" |
* '''STM32MP255C
**2x ARM Cortex-A35 with 1.2 GHz
**1x ARM Cortex-M33 up to 400 MHz
'''
*'''PMIC''' STPMIC25D
*'''LPDDR4 32-bit''' 4 Gbyte @ 1200 MHz
*'''eMMC Flash''' 16 Gbyte
*'''NOR Flash''' 4 Mbyte, Quad SPI interface
*'''EEPROM''' 4 kbyte
*'''microSD socket'''
*'''RTC''' temp. compensated RV-3032-C7
*'''USB Host''' 1x type A, 2.0 high-speed
*'''USB Type-C''' 1x USB-C 3.2 Gen 1x1 with DisplayPort alt. mode support
*'''WiFi / Bluetooth'''
**Tri band 2.4 GHz, 5 GHz and 6 GHz for IEEE802.11a/b/g/n/ac/ax
**Bluetooth® v5.4 BR/EDR/LE
**Antenna: U-FL connector
*'''Ethernet''' 2x 10 / 100 / 1000 Mbit/s, IEEE 802.3-compliant
|valign="top" style="border: 0pt;" |
*'''LVDS''' 1x Dual Link, 2x 4-lane LVDS connector
*'''MIPI-CSI2''' 1x 2-lanes connector
*'''TPM''' (Trusted Platform Module)2.0 device ST33KTPM2I
*'''Push-Buttons''' Power and reset
*'''Battery Socket''' CR1216, CR1220 and CR1225
*'''Boot Mode''' 4 bit boot mode switch
*'''Debug Interface''' JTAG interface via tag-connect
*'''Supply''' 5 VDC, USB Type-C power supply port
*'''Dimensions ''' 85 x 56 mm
*'''Raspberry Pi 40-pin Expansion'''
**2 x UART
**1 x I2C
**1 x I2S
**1 x SPI
**2 x PWM
**2 x CAN
**up to 28 x GPIOs
|}

== Product Change Notifications (PCN) ==

== IMPORTANT INFORMATIONS ==
* '''The DHSBC DisplayPort functionality has not yet been implemented at this time. The test image is a headless image. If you want to connect a display, please contact DH electronics. We can offer a 10" LVDS test kit, or you can connect your own LVDS display and we will assist with implementation.'''

== Documentation ==
* [[media:DOC_DHSBC-STM32MP25-Quick-Start-Guide_R01_2025-09-11.pdf|Getting-Started with DHSBC STM32MP25]]
* [[media:USM_DHCOS-STM32MP2x-preliminary_2025-05-27.pdf|DHCOS STM32MP2x User Manual '''IMPORTANT: Please have a look at chapter 27. Hardware design checklist''']]

== Design Files ==
* [[media:SCH_739-100-HS00048-customer-preliminary_R03_2025-03-27.pdf|DHSBC STM32MP25 Schematic]]
* [[media:DHCOS-STM32MP2-3D-STEP-736-100_R01_2025-03-25.zip|DHCOS STM32MP2x 3D STEP file]]
* [[media:DHSBC-STM32MP2-3D-STEP-739-100-R01 2025-09-12.zip|DHSBC STM32MP2 3D STEP file]]

== Software ==
* [https://github.com/dh-electronics/kas-dhsom Build your own Yocto LTS via kas (GitHub)]
: Note: Please use dh-stm32mp25-dhcos-dhsbc.yml configuration.
* [https://github.com/dh-electronics/meta-dhsom-stm32-wip-bsp Yocto BSP meta layer (Github)]
: Note: Currently, for the DHCOS STM32MP2, we use the 'meta-dhsom-stm32-wip-bsp' (work in progress) layer. The STM32MP2 will later be integrated into the meta-dhsom-stm32-bsp layer.

== Useful instructions ==
==== Setup new board and install image files via USB (dfu and ums mode) / U-Boot recovery via DFU ====
*[[DHSBC STM32MP2 DFU and UMS usage|DHSBC STM32MP2 DFU and UMS usage]]

==== How to connect to WiFi network ====
:'''Establish connection'''
:{| class="wikitable"
|<tt>$ wpa_passphrase "SSID" > /etc/wpa_supplicant.conf</tt>
|}
:-> In the next step, please enter the password
:{| class="wikitable"
|<tt>$ rfkill unblock all</tt>
|-
|<tt>$ wpa_supplicant -B -i wlansom0 -c /etc/wpa_supplicant.conf</tt>
|}
:'''Disconnect'''
:{| class="wikitable"
|<tt>$ ip link set wlansom0 down</tt>
|}
==== Use GPIOs ====
:'''To list available GPIOs, use the gpioinfo command:'''
:{| class="wikitable"
|<tt>$ gpioinfo</tt>
|}
gpiochip0 - 16 lines:
line 0: "DHSBC_HW-CODE_0" input consumer="kernel"
line 1: "DHSBC_HW-CODE_1" input
line 2: "DHSBC_HW-CODE_2" input
line 3: "PA3" input
line 4: "DHCOS-E" input
line 5: "DHCOS-J" input
line 6: "PA6" input
line 7: "PA7" input
...

:'''To set a GPIO as Output-High:'''
:{| class="wikitable"
|<tt>$ gpioset "LABLE"=1</tt>
|}

:'''To set a GPIO as Output-Low:'''
:{| class="wikitable"
|<tt>$ gpioset "LABLE"=0</tt>
|}

:'''To get current state of a GPIO:'''
:{| class="wikitable"
|<tt>$ gpioget "LABLE"</tt>
|}

==== Configure systemd network configuration ====
:'''Find configuration files:'''
:{| class="wikitable"
|<tt>find /usr -name \*wlansom0\*</tt>
|-
|<tt>find /usr -name \*ethsom0\*</tt>
|-
|<tt>find /usr -name \*ethsom1\*</tt>
|}

:'''systemd network configuration:'''
* [https://wiki.archlinux.org/title/Systemd-networkd systemd-networkd documentation]
* [https://www.freedesktop.org/software/systemd/man/latest/systemd.network.html systemd.network — Network configuration]

== Links ==
* [https://www.dh-electronics.com/en/embedded-products/dhsom/detail/dhcos-stm32mp2x DH DHCOS STM32MP2x]
* [https://www.dh-electronics.com/en/embedded-products/development-carrier-boards/detail/dhsbc-stm32mp25 DH DHSBC STM32MP25]
* [https://wiki.st.com/stm32mpu/wiki/Main_Page STM32 MPU wiki]
* [https://wiki.st.com/stm32mpu/wiki/STM32MP23_resources STM32MP23 resources]
* [https://wiki.st.com/stm32mpu/wiki/STM32MP25_resources STM32MP25 resources]

DHSBC STM32MP2x

2025-10-02T15:26:29Z

Ageisreiter: /* Software */

'''The DHSBC STM32MP25 board is the official DHCOS STM32MP25x reference design!'''

{|
|
|
|-
|__TOC__
|[[Image:DHSBC_STM32MP2-Top-medres.jpg|600px|DHSBC STM32MP2]]
|}

== Introduction ==
Reference design for secure industrial IoT devices based on STM32MP25

* Single Board Computer based on solderable, pin-compatible DHCOS STM32MP25 SOM
* Industrial grade, 10+ years available
* Mainline Linux support (also for Vivante GPU)
* Security Features e.g. Secure Boot / Storage
* Connectivity: Gbit Ethernet, WiFi/BT
* Multimedia: 3D GPU, display, video, camera
* STPMIC25 supports low power modes

== Technical Details ==
{| class="wikitable" align="center" | style="width: 100%; color: #000000; background: #f3f3f3;" valign="top" |
|-
| style="width: 50%; background: #076b8d; border: 0pt;" |
| style="width: 50%; background: #076b8d; border: 0pt;" |
|-
|valign="top" style="border: 0pt;" |
* '''STM32MP255C
**2x ARM Cortex-A35 with 1.2 GHz
**1x ARM Cortex-M33 up to 400 MHz
'''
*'''PMIC''' STPMIC25D
*'''LPDDR4 32-bit''' 4 Gbyte @ 1200 MHz
*'''eMMC Flash''' 16 Gbyte
*'''NOR Flash''' 4 Mbyte, Quad SPI interface
*'''EEPROM''' 4 kbyte
*'''microSD socket'''
*'''RTC''' temp. compensated RV-3032-C7
*'''USB Host''' 1x type A, 2.0 high-speed
*'''USB Type-C''' 1x USB-C 3.2 Gen 1x1 with DisplayPort alt. mode support
*'''WiFi / Bluetooth'''
**Tri band 2.4 GHz, 5 GHz and 6 GHz for IEEE802.11a/b/g/n/ac/ax
**Bluetooth® v5.4 BR/EDR/LE
**Antenna: U-FL connector
*'''Ethernet''' 2x 10 / 100 / 1000 Mbit/s, IEEE 802.3-compliant
|valign="top" style="border: 0pt;" |
*'''LVDS''' 1x Dual Link, 2x 4-lane LVDS connector
*'''MIPI-CSI2''' 1x 2-lanes connector
*'''TPM''' (Trusted Platform Module)2.0 device ST33KTPM2I
*'''Push-Buttons''' Power and reset
*'''Battery Socket''' CR1216, CR1220 and CR1225
*'''Boot Mode''' 4 bit boot mode switch
*'''Debug Interface''' JTAG interface via tag-connect
*'''Supply''' 5 VDC, USB Type-C power supply port
*'''Dimensions ''' 85 x 56 mm
*'''Raspberry Pi 40-pin Expansion'''
**2 x UART
**1 x I2C
**1 x I2S
**1 x SPI
**2 x PWM
**2 x CAN
**up to 28 x GPIOs
|}

== Product Change Notifications (PCN) ==

== IMPORTANT INFORMATIONS ==
* '''The DHSBC DisplayPort functionality has not yet been implemented at this time. The test image is a headless image. If you want to connect a display, please contact DH electronics. We can offer a 10" LVDS test kit, or you can connect your own LVDS display and we will assist with implementation.'''

== Documentation ==
* [[media:DOC_DHSBC-STM32MP25-Quick-Start-Guide_R01_2025-09-11.pdf|Getting-Started with DHSBC STM32MP25]]
* [[media:USM_DHCOS-STM32MP2x-preliminary_2025-05-27.pdf|DHCOS STM32MP2x User Manual '''IMPORTANT: Please have a look at chapter 27. Hardware design checklist''']]

== Design Files ==
* [[media:SCH_739-100-HS00048-customer-preliminary_R03_2025-03-27.pdf|DHSBC STM32MP25 Schematic]]
* [[media:DHCOS-STM32MP2-3D-STEP-736-100_R01_2025-03-25.zip|DHCOS STM32MP2x 3D STEP file]]
* [[media:DHSBC-STM32MP2-3D-STEP-739-100-R01 2025-09-12.zip|DHSBC STM32MP2 3D STEP file]]

== Software ==
* [https://github.com/dh-electronics/kas-dhsom Build your own Yocto LTS via kas (GitHub)]
* [https://github.com/dh-electronics/meta-dhsom-stm32-wip-bsp Yocto BSP meta layer (Github)]

== Useful instructions ==
==== Setup new board and install image files via USB (dfu and ums mode) / U-Boot recovery via DFU ====
*[[DHSBC STM32MP2 DFU and UMS usage|DHSBC STM32MP2 DFU and UMS usage]]

==== How to connect to WiFi network ====
:'''Establish connection'''
:{| class="wikitable"
|<tt>$ wpa_passphrase "SSID" > /etc/wpa_supplicant.conf</tt>
|}
:-> In the next step, please enter the password
:{| class="wikitable"
|<tt>$ rfkill unblock all</tt>
|-
|<tt>$ wpa_supplicant -B -i wlansom0 -c /etc/wpa_supplicant.conf</tt>
|}
:'''Disconnect'''
:{| class="wikitable"
|<tt>$ ip link set wlansom0 down</tt>
|}
==== Use GPIOs ====
:'''To list available GPIOs, use the gpioinfo command:'''
:{| class="wikitable"
|<tt>$ gpioinfo</tt>
|}
gpiochip0 - 16 lines:
line 0: "DHSBC_HW-CODE_0" input consumer="kernel"
line 1: "DHSBC_HW-CODE_1" input
line 2: "DHSBC_HW-CODE_2" input
line 3: "PA3" input
line 4: "DHCOS-E" input
line 5: "DHCOS-J" input
line 6: "PA6" input
line 7: "PA7" input
...

:'''To set a GPIO as Output-High:'''
:{| class="wikitable"
|<tt>$ gpioset "LABLE"=1</tt>
|}

:'''To set a GPIO as Output-Low:'''
:{| class="wikitable"
|<tt>$ gpioset "LABLE"=0</tt>
|}

:'''To get current state of a GPIO:'''
:{| class="wikitable"
|<tt>$ gpioget "LABLE"</tt>
|}

==== Configure systemd network configuration ====
:'''Find configuration files:'''
:{| class="wikitable"
|<tt>find /usr -name \*wlansom0\*</tt>
|-
|<tt>find /usr -name \*ethsom0\*</tt>
|-
|<tt>find /usr -name \*ethsom1\*</tt>
|}

:'''systemd network configuration:'''
* [https://wiki.archlinux.org/title/Systemd-networkd systemd-networkd documentation]
* [https://www.freedesktop.org/software/systemd/man/latest/systemd.network.html systemd.network — Network configuration]

== Links ==
* [https://www.dh-electronics.com/en/embedded-products/dhsom/detail/dhcos-stm32mp2x DH DHCOS STM32MP2x]
* [https://www.dh-electronics.com/en/embedded-products/development-carrier-boards/detail/dhsbc-stm32mp25 DH DHSBC STM32MP25]
* [https://wiki.st.com/stm32mpu/wiki/Main_Page STM32 MPU wiki]
* [https://wiki.st.com/stm32mpu/wiki/STM32MP23_resources STM32MP23 resources]
* [https://wiki.st.com/stm32mpu/wiki/STM32MP25_resources STM32MP25 resources]

DHSBC STM32MP2x

2025-09-24T14:35:34Z

Ageisreiter: /* Configure systemd network configuration */

'''The DHSBC STM32MP25 board is the official DHCOS STM32MP25x reference design!'''

{|
|
|
|-
|__TOC__
|[[Image:DHSBC_STM32MP2-Top-medres.jpg|600px|DHSBC STM32MP2]]
|}

== Introduction ==
Reference design for secure industrial IoT devices based on STM32MP25

* Single Board Computer based on solderable, pin-compatible DHCOS STM32MP25 SOM
* Industrial grade, 10+ years available
* Mainline Linux support (also for Vivante GPU)
* Security Features e.g. Secure Boot / Storage
* Connectivity: Gbit Ethernet, WiFi/BT
* Multimedia: 3D GPU, display, video, camera
* STPMIC25 supports low power modes

== Technical Details ==
{| class="wikitable" align="center" | style="width: 100%; color: #000000; background: #f3f3f3;" valign="top" |
|-
| style="width: 50%; background: #076b8d; border: 0pt;" |
| style="width: 50%; background: #076b8d; border: 0pt;" |
|-
|valign="top" style="border: 0pt;" |
* '''STM32MP255C
**2x ARM Cortex-A35 with 1.2 GHz
**1x ARM Cortex-M33 up to 400 MHz
'''
*'''PMIC''' STPMIC25D
*'''LPDDR4 32-bit''' 4 Gbyte @ 1200 MHz
*'''eMMC Flash''' 16 Gbyte
*'''NOR Flash''' 4 Mbyte, Quad SPI interface
*'''EEPROM''' 4 kbyte
*'''microSD socket'''
*'''RTC''' temp. compensated RV-3032-C7
*'''USB Host''' 1x type A, 2.0 high-speed
*'''USB Type-C''' 1x USB-C 3.2 Gen 1x1 with DisplayPort alt. mode support
*'''WiFi / Bluetooth'''
**Tri band 2.4 GHz, 5 GHz and 6 GHz for IEEE802.11a/b/g/n/ac/ax
**Bluetooth® v5.4 BR/EDR/LE
**Antenna: U-FL connector
*'''Ethernet''' 2x 10 / 100 / 1000 Mbit/s, IEEE 802.3-compliant
|valign="top" style="border: 0pt;" |
*'''LVDS''' 1x Dual Link, 2x 4-lane LVDS connector
*'''MIPI-CSI2''' 1x 2-lanes connector
*'''TPM''' (Trusted Platform Module)2.0 device ST33KTPM2I
*'''Push-Buttons''' Power and reset
*'''Battery Socket''' CR1216, CR1220 and CR1225
*'''Boot Mode''' 4 bit boot mode switch
*'''Debug Interface''' JTAG interface via tag-connect
*'''Supply''' 5 VDC, USB Type-C power supply port
*'''Dimensions ''' 85 x 56 mm
*'''Raspberry Pi 40-pin Expansion'''
**2 x UART
**1 x I2C
**1 x I2S
**1 x SPI
**2 x PWM
**2 x CAN
**up to 28 x GPIOs
|}

== Product Change Notifications (PCN) ==

== IMPORTANT INFORMATIONS ==
* '''The DHSBC DisplayPort functionality has not yet been implemented at this time. The test image is a headless image. If you want to connect a display, please contact DH electronics. We can offer a 10" LVDS test kit, or you can connect your own LVDS display and we will assist with implementation.'''

== Documentation ==
* [[media:DOC_DHSBC-STM32MP25-Quick-Start-Guide_R01_2025-09-11.pdf|Getting-Started with DHSBC STM32MP25]]
* [[media:USM_DHCOS-STM32MP2x-preliminary_2025-05-27.pdf|DHCOS STM32MP2x User Manual '''IMPORTANT: Please have a look at chapter 27. Hardware design checklist''']]

== Design Files ==
* [[media:SCH_739-100-HS00048-customer-preliminary_R03_2025-03-27.pdf|DHSBC STM32MP25 Schematic]]
* [[media:DHCOS-STM32MP2-3D-STEP-736-100_R01_2025-03-25.zip|DHCOS STM32MP2x 3D STEP file]]
* [[media:DHSBC-STM32MP2-3D-STEP-739-100-R01 2025-09-12.zip|DHSBC STM32MP2 3D STEP file]]

== Software ==
* [https://github.com/dh-electronics/kas-dhsom Build your own Yocto LTS via kas (GitHub)]
* [https://github.com/dh-electronics/meta-dhsom-stm32-bsp Yocto BSP meta layer (Github)]

== Useful instructions ==
==== Setup new board and install image files via USB (dfu and ums mode) / U-Boot recovery via DFU ====
*[[DHSBC STM32MP2 DFU and UMS usage|DHSBC STM32MP2 DFU and UMS usage]]

==== How to connect to WiFi network ====
:'''Establish connection'''
:{| class="wikitable"
|<tt>$ wpa_passphrase "SSID" > /etc/wpa_supplicant.conf</tt>
|}
:-> In the next step, please enter the password
:{| class="wikitable"
|<tt>$ rfkill unblock all</tt>
|-
|<tt>$ wpa_supplicant -B -i wlansom0 -c /etc/wpa_supplicant.conf</tt>
|}
:'''Disconnect'''
:{| class="wikitable"
|<tt>$ ip link set wlansom0 down</tt>
|}
==== Use GPIOs ====
:'''To list available GPIOs, use the gpioinfo command:'''
:{| class="wikitable"
|<tt>$ gpioinfo</tt>
|}
gpiochip0 - 16 lines:
line 0: "DHSBC_HW-CODE_0" input consumer="kernel"
line 1: "DHSBC_HW-CODE_1" input
line 2: "DHSBC_HW-CODE_2" input
line 3: "PA3" input
line 4: "DHCOS-E" input
line 5: "DHCOS-J" input
line 6: "PA6" input
line 7: "PA7" input
...

:'''To set a GPIO as Output-High:'''
:{| class="wikitable"
|<tt>$ gpioset "LABLE"=1</tt>
|}

:'''To set a GPIO as Output-Low:'''
:{| class="wikitable"
|<tt>$ gpioset "LABLE"=0</tt>
|}

:'''To get current state of a GPIO:'''
:{| class="wikitable"
|<tt>$ gpioget "LABLE"</tt>
|}

==== Configure systemd network configuration ====
:'''Find configuration files:'''
:{| class="wikitable"
|<tt>find /usr -name \*wlansom0\*</tt>
|-
|<tt>find /usr -name \*ethsom0\*</tt>
|-
|<tt>find /usr -name \*ethsom1\*</tt>
|}

:'''systemd network configuration:'''
* [https://wiki.archlinux.org/title/Systemd-networkd systemd-networkd documentation]
* [https://www.freedesktop.org/software/systemd/man/latest/systemd.network.html systemd.network — Network configuration]

== Links ==
* [https://www.dh-electronics.com/en/embedded-products/dhsom/detail/dhcos-stm32mp2x DH DHCOS STM32MP2x]
* [https://www.dh-electronics.com/en/embedded-products/development-carrier-boards/detail/dhsbc-stm32mp25 DH DHSBC STM32MP25]
* [https://wiki.st.com/stm32mpu/wiki/Main_Page STM32 MPU wiki]
* [https://wiki.st.com/stm32mpu/wiki/STM32MP23_resources STM32MP23 resources]
* [https://wiki.st.com/stm32mpu/wiki/STM32MP25_resources STM32MP25 resources]

DHSBC STM32MP2x

2025-09-24T14:33:43Z

Ageisreiter: /* Useful instructions */

'''The DHSBC STM32MP25 board is the official DHCOS STM32MP25x reference design!'''

{|
|
|
|-
|__TOC__
|[[Image:DHSBC_STM32MP2-Top-medres.jpg|600px|DHSBC STM32MP2]]
|}

== Introduction ==
Reference design for secure industrial IoT devices based on STM32MP25

* Single Board Computer based on solderable, pin-compatible DHCOS STM32MP25 SOM
* Industrial grade, 10+ years available
* Mainline Linux support (also for Vivante GPU)
* Security Features e.g. Secure Boot / Storage
* Connectivity: Gbit Ethernet, WiFi/BT
* Multimedia: 3D GPU, display, video, camera
* STPMIC25 supports low power modes

== Technical Details ==
{| class="wikitable" align="center" | style="width: 100%; color: #000000; background: #f3f3f3;" valign="top" |
|-
| style="width: 50%; background: #076b8d; border: 0pt;" |
| style="width: 50%; background: #076b8d; border: 0pt;" |
|-
|valign="top" style="border: 0pt;" |
* '''STM32MP255C
**2x ARM Cortex-A35 with 1.2 GHz
**1x ARM Cortex-M33 up to 400 MHz
'''
*'''PMIC''' STPMIC25D
*'''LPDDR4 32-bit''' 4 Gbyte @ 1200 MHz
*'''eMMC Flash''' 16 Gbyte
*'''NOR Flash''' 4 Mbyte, Quad SPI interface
*'''EEPROM''' 4 kbyte
*'''microSD socket'''
*'''RTC''' temp. compensated RV-3032-C7
*'''USB Host''' 1x type A, 2.0 high-speed
*'''USB Type-C''' 1x USB-C 3.2 Gen 1x1 with DisplayPort alt. mode support
*'''WiFi / Bluetooth'''
**Tri band 2.4 GHz, 5 GHz and 6 GHz for IEEE802.11a/b/g/n/ac/ax
**Bluetooth® v5.4 BR/EDR/LE
**Antenna: U-FL connector
*'''Ethernet''' 2x 10 / 100 / 1000 Mbit/s, IEEE 802.3-compliant
|valign="top" style="border: 0pt;" |
*'''LVDS''' 1x Dual Link, 2x 4-lane LVDS connector
*'''MIPI-CSI2''' 1x 2-lanes connector
*'''TPM''' (Trusted Platform Module)2.0 device ST33KTPM2I
*'''Push-Buttons''' Power and reset
*'''Battery Socket''' CR1216, CR1220 and CR1225
*'''Boot Mode''' 4 bit boot mode switch
*'''Debug Interface''' JTAG interface via tag-connect
*'''Supply''' 5 VDC, USB Type-C power supply port
*'''Dimensions ''' 85 x 56 mm
*'''Raspberry Pi 40-pin Expansion'''
**2 x UART
**1 x I2C
**1 x I2S
**1 x SPI
**2 x PWM
**2 x CAN
**up to 28 x GPIOs
|}

== Product Change Notifications (PCN) ==

== IMPORTANT INFORMATIONS ==
* '''The DHSBC DisplayPort functionality has not yet been implemented at this time. The test image is a headless image. If you want to connect a display, please contact DH electronics. We can offer a 10" LVDS test kit, or you can connect your own LVDS display and we will assist with implementation.'''

== Documentation ==
* [[media:DOC_DHSBC-STM32MP25-Quick-Start-Guide_R01_2025-09-11.pdf|Getting-Started with DHSBC STM32MP25]]
* [[media:USM_DHCOS-STM32MP2x-preliminary_2025-05-27.pdf|DHCOS STM32MP2x User Manual '''IMPORTANT: Please have a look at chapter 27. Hardware design checklist''']]

== Design Files ==
* [[media:SCH_739-100-HS00048-customer-preliminary_R03_2025-03-27.pdf|DHSBC STM32MP25 Schematic]]
* [[media:DHCOS-STM32MP2-3D-STEP-736-100_R01_2025-03-25.zip|DHCOS STM32MP2x 3D STEP file]]
* [[media:DHSBC-STM32MP2-3D-STEP-739-100-R01 2025-09-12.zip|DHSBC STM32MP2 3D STEP file]]

== Software ==
* [https://github.com/dh-electronics/kas-dhsom Build your own Yocto LTS via kas (GitHub)]
* [https://github.com/dh-electronics/meta-dhsom-stm32-bsp Yocto BSP meta layer (Github)]

== Useful instructions ==
==== Setup new board and install image files via USB (dfu and ums mode) / U-Boot recovery via DFU ====
*[[DHSBC STM32MP2 DFU and UMS usage|DHSBC STM32MP2 DFU and UMS usage]]

==== How to connect to WiFi network ====
:'''Establish connection'''
:{| class="wikitable"
|<tt>$ wpa_passphrase "SSID" > /etc/wpa_supplicant.conf</tt>
|}
:-> In the next step, please enter the password
:{| class="wikitable"
|<tt>$ rfkill unblock all</tt>
|-
|<tt>$ wpa_supplicant -B -i wlansom0 -c /etc/wpa_supplicant.conf</tt>
|}
:'''Disconnect'''
:{| class="wikitable"
|<tt>$ ip link set wlansom0 down</tt>
|}
==== Use GPIOs ====
:'''To list available GPIOs, use the gpioinfo command:'''
:{| class="wikitable"
|<tt>$ gpioinfo</tt>
|}
gpiochip0 - 16 lines:
line 0: "DHSBC_HW-CODE_0" input consumer="kernel"
line 1: "DHSBC_HW-CODE_1" input
line 2: "DHSBC_HW-CODE_2" input
line 3: "PA3" input
line 4: "DHCOS-E" input
line 5: "DHCOS-J" input
line 6: "PA6" input
line 7: "PA7" input
...

:'''To set a GPIO as Output-High:'''
:{| class="wikitable"
|<tt>$ gpioset "LABLE"=1</tt>
|}

:'''To set a GPIO as Output-Low:'''
:{| class="wikitable"
|<tt>$ gpioset "LABLE"=0</tt>
|}

:'''To get current state of a GPIO:'''
:{| class="wikitable"
|<tt>$ gpioget "LABLE"</tt>
|}

==== Configure systemd network configuration ====
:'''Find configuration files:'''
:{| class="wikitable"
|<tt>find /usr -name \*wlansom0\*</tt>
|-
|<tt>find /usr -name \*ethsom0\*</tt>
|-
|<tt>find /usr -name \*ethsom1\*</tt>
|}

== Links ==
* [https://www.dh-electronics.com/en/embedded-products/dhsom/detail/dhcos-stm32mp2x DH DHCOS STM32MP2x]
* [https://www.dh-electronics.com/en/embedded-products/development-carrier-boards/detail/dhsbc-stm32mp25 DH DHSBC STM32MP25]
* [https://wiki.st.com/stm32mpu/wiki/Main_Page STM32 MPU wiki]
* [https://wiki.st.com/stm32mpu/wiki/STM32MP23_resources STM32MP23 resources]
* [https://wiki.st.com/stm32mpu/wiki/STM32MP25_resources STM32MP25 resources]