DHCOM STM32MP1 Linux

Linux virtual machine for development

• Please have a look at: Virtual Machine for Application Development

FAQ

USB 1.1 problems: Custom board without USB 2.0 hub inbetween the MP1 USB host port?

And in that case, have a look at arch/arm/boot/dts/stm32mp15xx-dhcom-picoitx.dtsi and how the OHCI (!) is enabled there. And of course, make sure the kernel config options are enabled accordingly (like for the PicoITX machine)

meta-dhsom-stm32-bsp$ git grep OHCI

recipes-kernel/linux/linux-stable/5.10/dh-stm32mp1-common/dh-stm32mp1-dhsom-common.cfg:CONFIG_USB_OHCI_HCD=y recipes-kernel/linux/linux-stable/5.10/dh-stm32mp1-common/dh-stm32mp1-dhsom-common.cfg:CONFIG_USB_OHCI_HCD_PLATFORM=y

arch/arm/boot/dts/stm32mp15xx-dhcom-picoitx.dtsi snippet:

&usbh_ehci {
         phys = <&usbphyc_port0>;
         status = "okay";
};

&usbh_ohci { // <---------------- HERE
         phys = <&usbphyc_port0>;
         status = "okay";
};

&usbotg_hs {
         dr_mode = "otg";
         pinctrl-0 = <&usbotg_hs_pins_a>;
         pinctrl-names = "default";
         phy-names = "usb2-phy";
         phys = <&usbphyc_port1 0>;
         vbus-supply = <&vbus_otg>;
         status = "okay";
};

&usbphyc {
         status = "okay";
};

&usbphyc_port0 {
         phy-supply = <&vdd_usb>;
         vdda1v1-supply = <&reg11>;
         vdda1v8-supply = <&reg18>;
};

&usbphyc_port1 {
         phy-supply = <&vdd_usb>;
         vdda1v1-supply = <&reg11>;
         vdda1v8-supply = <&reg18>;
};

System stability or USB Host problems?

If a display with higher resolution and pixel clock > 48 MHz is used, then this can case USB host and/or system stability problems.

Workaround: The OSPEEDR must be set to OSPEEDR = 1 for LCD_CLK and OSPEEDR = 0 for all other LTDC signals.

&pinctrl {
	ltdc_pins_ customhmi: ltdc-dh-1 {
		pins1 {
			pinmux = <STM32_PINMUX('I', 14, AF14)>; /* LCD_CLK */
			bias-disable;
			drive-push-pull;
			slew-rate = <1>;
		};
		pins2 {
				pinmux = <STM32_PINMUX('I', 12, AF14)>, /* LCD_HSYNC */
				 <STM32_PINMUX('I', 13, AF14)>, /* LCD_VSYNC */
				 <STM32_PINMUX('K',  7, AF14)>, /* LCD_DE */
				 <STM32_PINMUX('I', 15, AF14)>, /* LCD_R0 */
				 <STM32_PINMUX('J',  0, AF14)>, /* LCD_R1 */
				 <STM32_PINMUX('J',  1, AF14)>, /* LCD_R2 */
				 <STM32_PINMUX('J',  2, AF14)>, /* LCD_R3 */
				 <STM32_PINMUX('J',  3, AF14)>, /* LCD_R4 */
				 <STM32_PINMUX('J',  4, AF14)>, /* LCD_R5 */
				 <STM32_PINMUX('J',  5, AF14)>, /* LCD_R6 */
				 <STM32_PINMUX('J',  6, AF14)>, /* LCD_R7 */
				 <STM32_PINMUX('J',  7, AF14)>, /* LCD_G0 */
				 <STM32_PINMUX('J',  8, AF14)>, /* LCD_G1 */
				 <STM32_PINMUX('J',  9, AF14)>, /* LCD_G2 */
				 <STM32_PINMUX('J', 10, AF14)>, /* LCD_G3 */
				 <STM32_PINMUX('J', 11, AF14)>, /* LCD_G4 */
				 <STM32_PINMUX('K',  0, AF14)>, /* LCD_G5 */
				 <STM32_PINMUX('K',  1, AF14)>, /* LCD_G6 */
				 <STM32_PINMUX('K',  2, AF14)>, /* LCD_G7 */
				 <STM32_PINMUX('J', 12, AF14)>, /* LCD_B0 */
				 <STM32_PINMUX('J', 13, AF14)>, /* LCD_B1 */
				 <STM32_PINMUX('J', 14, AF14)>, /* LCD_B2 */
				 <STM32_PINMUX('J', 15, AF14)>, /* LCD_B3 */
				 <STM32_PINMUX('K',  3, AF14)>, /* LCD_B4 */
				 <STM32_PINMUX('K',  4, AF14)>, /* LCD_B5 */
				 <STM32_PINMUX('K',  5, AF14)>, /* LCD_B6 */
				 <STM32_PINMUX('K',  6, AF14)>; /* LCD_B7 */
			bias-disable;
			drive-push-pull;
			slew-rate = <0>;
		};
	};
	
	ltdc_sleep_pins_ customhmi: ltdc-sleep-dh-1 {
		pins {
			pinmux = <STM32_PINMUX('I', 14, ANALOG)>, /* LCD_CLK */
				 <STM32_PINMUX('I', 12, ANALOG)>, /* LCD_HSYNC */
				 <STM32_PINMUX('I', 13, ANALOG)>, /* LCD_VSYNC */
				 <STM32_PINMUX('K',  7, ANALOG)>, /* LCD_DE */
				 <STM32_PINMUX('I', 15, ANALOG)>, /* LCD_R0 */
				 <STM32_PINMUX('J',  0, ANALOG)>, /* LCD_R1 */
				 <STM32_PINMUX('J',  1, ANALOG)>, /* LCD_R2 */
				 <STM32_PINMUX('J',  2, ANALOG)>, /* LCD_R3 */
				 <STM32_PINMUX('J',  3, ANALOG)>, /* LCD_R4 */
				 <STM32_PINMUX('J',  4, ANALOG)>, /* LCD_R5 */
				 <STM32_PINMUX('J',  5, ANALOG)>, /* LCD_R6 */
				 <STM32_PINMUX('J',  6, ANALOG)>, /* LCD_R7 */
				 <STM32_PINMUX('J',  7, ANALOG)>, /* LCD_G0 */
				 <STM32_PINMUX('J',  8, ANALOG)>, /* LCD_G1 */
				 <STM32_PINMUX('J',  9, ANALOG)>, /* LCD_G2 */
				 <STM32_PINMUX('J', 10, ANALOG)>, /* LCD_G3 */
				 <STM32_PINMUX('J', 11, ANALOG)>, /* LCD_G4 */
				 <STM32_PINMUX('K',  0, ANALOG)>, /* LCD_G5 */
				 <STM32_PINMUX('K',  1, ANALOG)>, /* LCD_G6 */
				 <STM32_PINMUX('K',  2, ANALOG)>, /* LCD_G7 */
				 <STM32_PINMUX('J', 12, ANALOG)>, /* LCD_B0 */
				 <STM32_PINMUX('J', 13, ANALOG)>, /* LCD_B1 */
				 <STM32_PINMUX('J', 14, ANALOG)>, /* LCD_B2 */
				 <STM32_PINMUX('J', 15, ANALOG)>, /* LCD_B3 */
				 <STM32_PINMUX('K',  3, ANALOG)>, /* LCD_B4 */
				 <STM32_PINMUX('K',  4, ANALOG)>, /* LCD_B5 */
				 <STM32_PINMUX('K',  5, ANALOG)>, /* LCD_B6 */
				 <STM32_PINMUX('K',  6, ANALOG)>; /* LCD_B7 */
		};
	};	
};

Linux Kernel

How to build a Kernel

Get sources from Github 1. Start the Console on Linux 2. git clone https://github.com/dh-electronics/linux-stm32mp1.git --branch dev/5.4.69_dhsom 3. cd linux-stm32mp1 Configure and build the Device Tree + Kernel 4. ARCH=arm CROSS_COMPILE=/opt/gcc-arm-8.3-2019.03-x86_64-arm-linux-gnueabihf/bin/arm-linux-gnueabihf- make stm32mp1_dhsom_defconfig 5. ARCH=arm CROSS_COMPILE=/opt/gcc-arm-8.3-2019.03-x86_64-arm-linux-gnueabihf/bin/arm-linux-gnueabihf- make menuconfig (optional: If you want to add/remove Kernel features) 6. ARCH=arm CROSS_COMPILE=/opt/gcc-arm-8.3-2019.03-x86_64-arm-linux-gnueabihf/bin/arm-linux-gnueabihf- make dtbs 7. ARCH=arm CROSS_COMPILE=/opt/gcc-arm-8.3-2019.03-x86_64-arm-linux-gnueabihf/bin/arm-linux-gnueabihf- make zImage Create the FIT-image with our script (Download link) Interactive mode for selecting device trees Device trees are set as parameter 8. create_fitimage Enter the numbers (space seperated) of the device trees to include (e.g. if you want to include the device tree for the PDK2 include the number of ./arch/arm/boot/dts/stm32mp157c-dhcom-pdk2.dtb (usually 3). Enter the numbers (space seperated) of the device trees overlays to include (e.g. for the PDK2 enter the files which contain PDK2 (usually 8 9 10 11 12 13 14). (Example is for the PDK2) 8. create_fitimage --dtb ./arch/arm/boot/dts/stm32mp157c-dhcom-pdk2.dtb --dtbo ./arch/arm/boot/dts/stm32mp157c-dhcom-pdk2-overlay-460-200-x11.dtbo,./arch/arm/boot/dts/stm32mp157c-dhcom-pdk2-overlay-497-200-x12.dtbo,./arch/arm/boot/dts/stm32mp157c-dhcom-pdk2-overlay-505-200-x12-ch101olhlwh.dtbo,./arch/arm/boot/dts/stm32mp157c-dhcom-pdk2-overlay-531-100-x21.dtbo,./arch/arm/boot/dts/stm32mp157c-dhcom-pdk2-overlay-531-100-x22.dtbo,./arch/arm/boot/dts/stm32mp157c-dhcom-pdk2-overlay-560-200-x12.dtbo,./arch/arm/boot/dts/stm32mp157c-dhcom-pdk2-overlay-638-100-x12-rpi7inch.dtbo

Kernel Userspace Interfaces to Access Hardware

RS-485 on picoITX

RS-485 device

DHCOM UART 2

/dev/ttySTM2

Compilation on target

gcc tty_rs485_test.c -o tty_rs485_test

Set tty device to raw mode

stty -F /dev/ttySTM2 115200 cs8 raw -echo

Send data with demo program

./tty_rs485_test /dev/ttySTM2

Receive data with demo program

./tty_rs485_test /dev/ttySTM2

Download example source code

• tty_rs485_test.c

CAN interface

Setup CAN interface with baudrate 500kbit/sec.

ip link set can0 up type can bitrate 500000

Start to listen on CAN port

candump can0

Send test message

cansend can0 100#11.2233.44556677.88

Deinitialize CAN port

ip link set can0 down