DHCOM STM32MP1 Linux: Difference between revisions
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|<tt>'' | |<tt>''gcc tty_rs485_test_v1.1.c -o tty_rs485_test''</tt> | ||
|<tt>''gcc tty_rs485_flags_v1.0.c -o tty_rs485_flags''</tt> | |||
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Revision as of 08:46, 10 August 2021
Linux virtual machine for development
- Please have a look at: Virtual Machine for Application Development
Linux Kernel
How to build a Kernel
Get sources from Github
Configure and build the Device Tree + Kernel
Create the FIT-image with our script (Download link)
|
Kernel Userspace Interfaces to Access Hardware
RS-485 on picoITX
- RS-485 device
DHCOM UART 2 /dev/ttySTM2
- Compilation on target
gcc tty_rs485_test_v1.1.c -o tty_rs485_test gcc tty_rs485_flags_v1.0.c -o tty_rs485_flags
- Set tty device to raw mode
stty -F /dev/ttySTM2 115200 cs8 raw -echo
- Send data with demo program
echo -n -e "\n\rHallo RS485 Welt!" ¦ ./tty_rs485_test /dev/ttySTM2
- Receive data with demo program
./tty_rs485_test /dev/ttySTM2
- Download example source code
CAN interface
- Setup CAN interface with baudrate 500kbit/sec.
ip link set can0 up type can bitrate 500000
- Start to listen on CAN port
candump can0
- Send test message
cansend can0 100#11.2233.44556677.88
- Deinitialize CAN port
ip link set can0 down
I2C Interfaces
DHCOM I2C 1 /dev/i2c-1 DHCOM I2C 2 /dev/i2c-0 On Module Devices /dev/i2c-2
FAQ
USB 1.1 problems: Custom board without USB 2.0 hub inbetween the MP1 USB host port?
And in that case, have a look at arch/arm/boot/dts/stm32mp15xx-dhcom-picoitx.dtsi and how the OHCI (!) is enabled there. And of course, make sure the kernel config options are enabled accordingly (like for the PicoITX machine)
meta-dhsom-stm32-bsp$ git grep OHCI |
recipes-kernel/linux/linux-stable/5.10/dh-stm32mp1-common/dh-stm32mp1-dhsom-common.cfg:CONFIG_USB_OHCI_HCD=y |
arch/arm/boot/dts/stm32mp15xx-dhcom-picoitx.dtsi snippet:
&usbh_ehci { phys = <&usbphyc_port0>; status = "okay"; }; &usbh_ohci { // <---------------- HERE phys = <&usbphyc_port0>; status = "okay"; }; &usbotg_hs { dr_mode = "otg"; pinctrl-0 = <&usbotg_hs_pins_a>; pinctrl-names = "default"; phy-names = "usb2-phy"; phys = <&usbphyc_port1 0>; vbus-supply = <&vbus_otg>; status = "okay"; }; &usbphyc { status = "okay"; }; &usbphyc_port0 { phy-supply = <&vdd_usb>; vdda1v1-supply = <®11>; vdda1v8-supply = <®18>; }; &usbphyc_port1 { phy-supply = <&vdd_usb>; vdda1v1-supply = <®11>; vdda1v8-supply = <®18>; };
System stability or USB Host problems?
If a display with higher resolution and pixel clock > 48 MHz is used, then this can case USB host and/or system stability problems.
Workaround: The OSPEEDR must be set to OSPEEDR = 1 for LCD_CLK and OSPEEDR = 0 for all other LTDC signals.
&pinctrl { ltdc_pins_ customhmi: ltdc-dh-1 { pins1 { pinmux = <STM32_PINMUX('I', 14, AF14)>; /* LCD_CLK */ bias-disable; drive-push-pull; slew-rate = <1>; }; pins2 { pinmux = <STM32_PINMUX('I', 12, AF14)>, /* LCD_HSYNC */ <STM32_PINMUX('I', 13, AF14)>, /* LCD_VSYNC */ ... <STM32_PINMUX('K', 6, AF14)>; /* LCD_B7 */ bias-disable; drive-push-pull; slew-rate = <0>; }; }; ltdc_sleep_pins_ customhmi: ltdc-sleep-dh-1 { pins { pinmux = <STM32_PINMUX('I', 14, ANALOG)>, /* LCD_CLK */ ... <STM32_PINMUX('K', 6, ANALOG)>; /* LCD_B7 */ }; }; };
How to try QtWebengine
The QtWebengine is part of the DH default images. Please stop the Weston desktop, before the start of the Browser.
Older images: "systemctl stop weston@root.service" Newer images: "systemctl stop weston.service"
How to start the Browser:
QT_QPA_PLATFORM=eglfs QT_QPA_EGLFS_ALWAYS_SET_MODE=1 QT_QPA_EGLFS_KMS_CONFIG=/etc/default/qt5-eglfs-kms.json qtwebengine-minimal http://YOUR-TEST-PAGE/ --no-sandbox