DHCOM iMX6ULL-D2: Difference between revisions

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*[[DHCOM Update Mechanism|DHCOM Update Mechanism]]
*[[DHCOM Update Mechanism|DHCOM Update Mechanism]]
*[[Yocto | Yocto on DHCOM]]
*[[Yocto | Yocto on DHCOM]]
== BSP Sources==
==== U-Boot ====
* [https://github.com/dh-electronics/u-boot-imx6qdl/tree/dev/legacy/2018.05_dhcom DH U-Boot (based on v2018.05)]
* [https://github.com/dh-electronics/u-boot-imx6qdl/tree/dev/2015.10_dhcom DH U-Boot (based on v2015.10)]
* [https://github.com/dh-electronics/u-boot-imx6qdl/tree/dev/2013.10_dhcom DH U-Boot (based on v2013.10)]
==== Linux Kernel ====
* Mainline
:* [https://github.com/dh-electronics/linux-imx6qdl/tree/dev/4.4.60_dhcom DH 4.4.60 Development]
:* [https://github.com/dh-electronics/linux-imx6qdl/tree/release/4.4.60_dhcom/20190926 DH 4.4.60 Release 2019-09-26]
:* [https://github.com/dh-electronics/linux-imx6qdl/tree/dev/3.14.12_dhcom DH 3.14.12 Development]
* NXP Vendor
:* [https://github.com/dh-electronics/linux-imx6-vendor/tree/release/v4.1.15/20190624 DH 4.1.15 Release 2019-06-24]
:* [https://github.com/dh-electronics/linux-imx6-vendor/tree/release/v3.10.17/20170804 DH 3.10.17 Release 2017-08-04]


== Downloads ==
== Downloads ==

Revision as of 14:46, 24 February 2020

COM iMX6ULL-D2

Hardware

  • Cortex-A7 NXP i.MX6ULL up to 900 MHz
  • 128 - 1024 MByte NAND flash memory (8 bit bus width) or
    4 - 16 GByte eMMC flash (8 bit bus width)
  • 2 MB SPI boot flash
  • 128 - 1024 MByte DDR3-400
  • On module microSD card socket (4 bit SDIO) [1]
  • LC display controller, 18 bit colors, 1366x768 pixels
  • On-chip touch controller for 4-wire resistive touch screens
  • 2x Ethernet controller 10/100 Mbit, IEEE1588 conform [2]
  • USB 2.0 OTG high-speed
  • USB 2.0 host high speed
  • 2x Standard UART with hardware handshake support [3][4]
  • WiFi iEEE802.11b/g/n + Bluetooth v4.1 (BR/EDR/BLE) module on BGA [1][4]


[1] On module microSD card socket is only available if WiFi is not mounted.
[2] The second SPI is only available, if the second ethernet is not mounted.
[3] CTS and RTS of the first UART is only available if second CAN port is not connected.
[4] The second UART is only available if Bluetooth is not used. This means WiFi/BT module 1DX is not mounted or module 1FX (only WiFi) is mounted.
[5] I²S lines are shared with JTAG.

  • 2x CAN interface [3]
  • 2x SPI interface [2]
  • 2x I²C interface
  • I²S Audio codec (1 x microphone, 1 x Line in, 1x Line out) [5]
  • Real-time clock (I²C connection), low power temperature compensated
  • 2x 10 bit analog input (I²C connection)
  • 2x 256 Bytes EEPROM with integrated MAC address
  • PWM channel
  • 22 GPIOs (A-U + INT_HI_PRIO)
  • JTAG debug connection via FFC plug connector
  • Industrial temperature range (-40°C to +85°C)
  • SODIMM-200 socket with DHCOM pin assignment

Software Support

BSP Sources

U-Boot

Linux Kernel

  • Mainline
  • NXP Vendor

Downloads

U-Boot Sources

Update-Kernel

Linux Kernel Sources / Prebuilt Kernels

  • Mainline
  • Vendor

Debian based root file systems

  • Debian alone
  • Debian Qt5

Virtual Machine for Application Development

Mainline Linux 4.4.x eMMC update package

Code Examples for Userspace-Applications to Access SPI, I2C, GPIOs, and more

WEC7 DHHalLib.dll (function library)

WEC7 binary BSP

WEC2013 DHHalLib.dll (function library)